View source for Crystal oscillator frequencies

{{short description|Frequencies used by electrical components}}
{{Cleanup bare URLs|date=June 2022}}
[[Crystal oscillator]]s can be manufactured for oscillation over a wide range of frequencies, from a few kilohertz up to several hundred [[megahertz]]. Many applications call for a crystal oscillator frequency conveniently related to some other desired frequency, so hundreds of standard crystal frequencies are made in large quantities and stocked by electronics distributors. Using [[frequency divider]]s, [[frequency multiplier]]s and [[phase locked loop]] circuits, it is practical to derive a wide range of frequencies from one reference frequency.

The [[Universal asynchronous receiver-transmitter|UART]] column shows the highest common [[Symbol rate|baud rate]] (under 1,000,000), assuming a clock pre-divider of 16 is resolved to an exact integer baud rate.  Though some UART variations have fractional dividers, those concepts are ignored to simplify this table.

{| class="wikitable sortable" <!-- italic in frequency specifies a multiple of a frequency that is already listed as lower ???? -->
|-
! Frequency ([[Hertz|MHz]])
! comm
! [[Universal asynchronous receiver-transmitter|UART]]
! A/V
! [[Real-time clock|RTC]]
! Notes and Primary uses
|-
| 0.032000
| 
| 
| 
| {{Ya}}
| Real-time clock, watches; allows binary division to 1&nbsp;kHz signal (2<sup>5</sup>×1&nbsp;kHz).
|-
| 0.032768
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>15</sup>]] allows binary division to 1&nbsp;Hz. Real-time clock, [[quartz clock|quartz watches]] and clocks; common low-speed for microcontrollers. Very common. Available as TCXO.<ref>{{Cite web |url=http://www.maximintegrated.com/en/products/digital/real-time-clocks/DS3231.html |title=DS3231 Extremely Accurate I²C-Integrated RTC/TCXO/Crystal - Maxim |access-date=2015-04-26 |archive-url=https://web.archive.org/web/20150516122714/http://www.maximintegrated.com/en/products/digital/real-time-clocks/DS3231.html |archive-date=2015-05-16 |url-status=dead }}</ref>
|-
| 0.038000
| 
| 
| 
| 
| Used with FM stereo encoder chip BA1404 and similar. 
|-
| 0.065536
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>16</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock.
|-
| 0.077500
| 
| 
| 
| {{Ya}}
| Real-time clock, [[quartz clock|quartz watches]] and clocks; also the [[DCF77]] frequency
|-
| 0.100000
| 
| 
| 
| {{Ya}}
| [[Power of 10|10<sup>5</sup>]] allows decade division to 1&nbsp;Hz and 1&nbsp;kHz. Real-time clock, [[quartz clock|quartz watches]] and clocks, [[multimeter|DMM]] [[integrating ADC|dual slope ADCs]] (suppresses [[mains hum|50&nbsp;Hz noise]])
|-
| 0.120000
| 
| 
| 
| {{Ya}}
| [[multimeter|DMM]] [[integrating ADC|dual slope ADCs]] (suppresses [[mains hum|60&nbsp;Hz noise]])
|-
| 0.131072
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>17</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Found in Fluke 17/19 DMM's{{citation needed|date=August 2012}}
|-
| 0.262144
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>18</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Found in [[Bulova]] Precisionist high-frequency quartz watches.<ref>[[Bulova]]{{Circular reference|date=July 2018}}</ref>
|-
| 0.383000
| 
| 
| 
| 
| Ceramic resonator, in e.g. Polaroid Sonia Transducer for distance<ref>{{Cite web |url=https://sites.google.com/site/integritytechnologynet//resonator-mcu |title=Resonator-MCU - integritytechnology |access-date=2020-06-07 |archive-date=2020-10-23 |archive-url=https://web.archive.org/web/20201023160838/https://sites.google.com/site/integritytechnologynet/resonator-mcu |url-status=dead }}</ref>
|-
| 0.429000
| 
| 
| radio (filter)
| 
| [[Ceramic resonator]] used in some [[intermediate frequency]] filters. Common in oscillators of 36&nbsp;kHz [[consumer IR|infrared remote controls]] (divided by 12)
|-
| 0.455000
| 
| 
| radio (filter)
| 
| [[Ceramic resonator]] used in [[FM broadcasting]] [[intermediate frequency]] [[band-pass filter|filters]]. Common in oscillators of 38&nbsp;kHz [[consumer IR|infrared remote controls]] (divided by 12), cheaper than crystal but less stable frequency
|-
| 0.460800
| 
| 28800
| radio
| 
| [[Ceramic resonator]] used in [[Highway Addressable Remote Transducer Protocol|HART]]. UART clock allows integer division to common baud rates up to 28,800(×16×1) or 57,600(×8×1).
|-
| 0.480000
| 
| 
| radio (filter)
| 
| [[Ceramic resonator]] used in some [[intermediate frequency]] [[band-pass filter|filters]] and low-cost oscillators. Also used in [[DTMF]] generator oscillators.
|-
| 0.500000
| 
| 
| radio (filter)
| 
| [[Ceramic resonator]] used in some [[intermediate frequency]] [[band-pass filter|filters]] and low-cost oscillators
|-
| 0.524288
| 
| 
|
| {{ya}}
| [[Power of two#Table of values|2<sup>19</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz.
|-
| 1.000
|
|
|
|
| [[Power of 10|10<sup>6</sup>]] allows decade division to 1&nbsp;Hz and 1&nbsp;kHz. Reference frequency. Common standard frequency. [[Harmonic]]s fall on integer MHz frequencies.
|-
| 1.048576
|
|
|
| {{Ya}}
| [[Power of two#Table of values|2<sup>20</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock.
|-
| 1.008
| 
| 1200
| 
| 
| UART clock allows integer division to common baud rates up to 1,200(×8×105). Used in some 1200 baud modems.
|-
| 1.544
| [[Digital Signal 1|DS1]]
| 
| 
| 
| Bit clock for [[Digital Signal 1|DS1]] systems (±32 ppm, ANSI T1.102).
|-
| 1.8432
| 
| 115200
| 
| 
| UART clock allows integer division to common baud rates up to 115,200(×16×1) or 230,400(×8×1).  Since older UARTs used this frequency to derive common baud rates up to 115,200, then multiples of this frequency are able to do the same, such as 3.6864 / 5.5296 / 7.3728 / 9.216 / 11.0592 / 12.9024 / 14.7456 / 16.5888 / 18.432 / 20.2752 / 22.1184 / 23.9616 / 25.8048 / 27.648 / 29.4912 / 31.3344 / 33.1776 / 35.0208 / 36.864 / ..., and is why these MHz frequencies are commonly used.
|-
| 2.048
| [[E-carrier level 1|E1]]
| 
| 
| 
| Allows binary division to 1&nbsp;kHz (2<sup>11</sup>×1&nbsp;kHz). Bit clock for [[E-carrier level 1|E1]] systems (±50 ppm, ITU G3703).
|-
| 2.097152
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>21</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz; real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 2.4576
| 
| 38400
| 
| 
| UART clock allows integer division to common baud rates up to 38,400(×16×4) or 76,800(×16×2).
|-
| 2.500
| [[Ethernet]]
| 
| 
| 
| [[Ethernet]] clock for 10 Mbit/s
|-
| 2.560
| 
| 
| 
| 
| Allows binary division to 10&nbsp;kHz (2<sup>8</sup>×10&nbsp;kHz)
|-
| 2.8224
|
| 2400
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows binary division to [[44.1 kHz|44.1&nbsp;kHz]] (64×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. DSD64 bitrate. Frequencies also used are 5.6448&nbsp;MHz, 11.2896&nbsp;MHz, 16.9344&nbsp;MHz, 22.5972&nbsp;MHz, 33.8688&nbsp;MHz and 45.1584&nbsp;MHz.
|-
| 2.880
| 
| 7200
| 
| 
| UART clock allows integer division to common baud rates up to 7,200(×16×25) or 14,400(×8×25).  Audio clock allows integer division for 48 / 96 / 192 ksps.
|-
| 3.072
| 
| 128000
| audio
| {{Ya}}
| Allows binary division to 3&nbsp;kHz (2<sup>10</sup>×3&nbsp;kHz); can be used to generate 60&nbsp;Hz signals (51200×60&nbsp;Hz). Used in audio systems, for 48&nbsp;kHz (64×), 96&nbsp;kHz (32×), 192&nbsp;kHz (16×), 384&nbsp;kHz (8×)
|-
| 3.088
| [[Digital Signal 1|DS1]]
| 
| 
| 
| 2×1.544, the bit clock for [[Digital Signal 1|DS1]] systems (±32 ppm, ANSI T1.102). Available as TCXO and OCXO.
|-
| 3.2768
| 
| 
| 
| {{Ya}}
| Allows binary division to 100&nbsp;Hz (32,768×100&nbsp;Hz, or 2<sup>15</sup>×100&nbsp;Hz) and to 50&nbsp;Hz, used in e.g. wattmeters and DC-AC converters
|-
| 3.560
| [[Amateur Radio]]
|
|
|
| A common [[QRP operation|QRP]] [[frequency]] ([[80-meter band]]), also called 3560&nbsp;kHz. Other less common crystals for the same band are 3.535, 3.550 (SKKC), 3.579 (digital modes) MHz. See also 7.025&nbsp;MHz.
|-
| 3.575611
| 
| 
| [[PAL]]
| 
| [[PAL]] [[Broadcast television systems#ITU identification scheme|M]] color [[subcarrier]]
|-
| 3.579545
| 
| 
| [[NTSC]]
| 
| [[NTSC]] M color subcarrier; see [[colorburst]].  More specifically, 315/88 = 3.579{{overline|54}}&nbsp;MHz. Because these are very common and inexpensive they are used in many other applications, for example [[DTMF]] generators
|-
| 3.582056
| 
| 
| [[PAL]]
| 
| [[PAL]]-[[Broadcast television systems#ITU identification scheme|N]] color subcarrier
|-
| 3.595295
| 
| 
| [[NTSC]]
| 
| [[NTSC]] M color subcarrier, plus horizontal scan rate (15,750). Used for a rainbow color test, produces color through the entire 360 degrees of phase shift.  Unusual.<ref>{{cite mailing list |title=strange crystal frequencies |first=Barry |last=Weitzman |date=March 16, 2008 |mailing-list=cctalk |url=http://www.classiccmp.org/pipermail/cctalk/2008-March/069313.html |archive-url=https://web.archive.org/web/20141005223516/http://www.classiccmp.org/pipermail/cctalk/2008-March/069313.html |archive-date=October 5, 2014}}</ref>
|-
| 3.640
| 
| 
| radio
| 
| 8×455&nbsp;kHz AM broadcast band [[intermediate frequency]]; also often used in [[infrared remote control]]s as the clock source
|-
| 3.6864
| [[W-CDMA]]
| 230400
| 
| 
| UART clock allows integer division to common baud rates up to 230,400(×16×1) or 460,800(×8×1). Also used in [[W-CDMA]] systems.
|-
| 3.93216
| 
| 
| 
| {{ya}}
| Allows binary division to 60&nbsp;Hz (65536×60&nbsp;Hz, 2<sup>16</sup>×60&nbsp;Hz), used e.g. in wattmeters, DC-AC converters and NTSC vertical sync generators
|-
| 4.000
| 
| 
| 
| 
| Common general low-power microcontroller frequency. Common as cheap [[ceramic resonator]]s where frequency stability is of less concern than cost.
|-
| 4.032
| 
| 7200
| 
| 
| UART clock allows integer division to common baud rates up to 7,200(×16×35) or 14,400(×8×35), used for some 1200, 2400, and 4800 baud modems.
|-
| 4.096
| [[ISDN]]
| 256000
| 
| {{Ya}}
| Allows binary division to 1&nbsp;kHz (2<sup>12</sup>×1&nbsp;kHz). Used in [[ISDN]] systems.
|-
| 4.190
| 
| 
| 
| 
| [[Ceramic resonator]] used in some [[intermediate frequency]] [[band-pass filter|filters]] and low-cost oscillators, common
|-
| 4.194304
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>22</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock. For [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step. Also found in the original [[Game Boy]].
|-
| 4.320
| 
| 1800
| 
| {{Ya}}
| Used for measuring 1pps deviations in 1/50th seconds per day (24h × 60m × 60s × 50). UART clock allows integer division to common baud rates up to 1,800(×16×150) or 7,200(×8×75). Audio clock allows integer division for 48 / 96 ksps.
|-
| 4.3218
| 
| 
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows integer division to [[44.1 kHz|44.1&nbsp;kHz]] (98×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. Frequencies also used are 8.6436&nbsp;MHz and 17.2872&nbsp;MHz.
|-
| 4.332
| [[Radio Data System|RDS]]
| 
| 
| 
| 3648× the RDS signal bit rate of 1187.5&nbsp;bit/s.  While the frequency of 4.332&nbsp;MHz is the most commonly used crystal resonator, its multiples (2×4.332&nbsp;MHz = 8.664&nbsp;MHz or 4×4.332&nbsp;MHz = 17.328&nbsp;MHz) have been used also.
|-
| 4.43361875
| 
| 
| [[PAL]]/[[NTSC]]
| 
| [[PAL]] [[Broadcast television systems#ITU identification scheme|B/D/G/H/I]] and NTSC M4.43 color subcarrier.  Also used in [[Compact Disc]] players and recorders where the crystal frequency is slightly pulled to 4.41&nbsp;MHz and then divided by 100 to give the 44.1&nbsp;kHz [[sampling frequency]]. See also twice the frequency, 8.867238&nbsp;MHz.
|-
| 4.608
|
| 57600
| audio
| {{Ya}}
| UART clock allows integer division to common baud rates up to 57,600(×16×5) or 115,200(×8×5). Audio clock allows integer division for 48 / 96 / 192 ksps. Allows integer division to 1024&nbsp;kHz and binary division to lower frequencies that are whole multiples of 1&nbsp;Hz. Common microcontroller clock frequency. Frequency of the Master Timing Unit (MTU) OCXO of the [[Space Shuttle]].<ref>[http://www.columbiassacrifice.com/techdocs/subsystems/Subsys_Instrumentation.pdf Instrumentation] {{webarchive|url=https://web.archive.org/web/20100911055940/http://www.columbiassacrifice.com/techdocs/subsystems/Subsys_Instrumentation.pdf |date=2010-09-11 }}. (PDF) . Retrieved on 2010-02-08.</ref><ref>[http://www.nasa.gov/columbia/caib/PDFS/VOL2/D19.PDF D19 - Sensor Data]. (PDF) . Retrieved on 2010-02-08.</ref>
|-
| 4.7547
| 
| 
| radio (ISM)
| 
| Oscillator for 315&nbsp;MHz FSK/ASK superheterodyne receivers with 10.7&nbsp;MHz intermediate frequency (common Chinese ISM band use for small RF remote controls), multiplied 64× (4.7547×64+10.7=315) <ref name="maximintegrated.com">{{Cite web|url=https://www.maximintegrated.com/en/design/technical-documents/app-notes/3/3395.html|title = Requirements of Remote Keyless Entry Systems &#124; Maxim Integra}}</ref>
|-
| 4.897
| 
| 
| 
| 
| Reference clock for some 315&nbsp;MHz transmitters and receivers, e.g. [[garage door opener]]s. (Alternative frequencies for the same chipsets: 6.0630&nbsp;MHz for 390&nbsp;MHz, 6.4983&nbsp;MHz for 418.00&nbsp;MHz, 6.7458&nbsp;MHz for 433.92&nbsp;MHz; swapping them can swap the band.)
|-
| 4.9152
| [[CDMA]]
| 38400
| 
| 
| Used in [[CDMA]] systems; divided to 1.2288&nbsp;MHz baseband frequency as specified by J-STD-008. UART clock allows integer division to common baud rates up to 38,400(×16×8) or 76,800(×8×4).
|-
| 5.000
| 
| 
| 
| 
| Common standard frequency. Commonly available as TCXO and OCXO.
|-
| 5.034965<!--84000 * 60 / 1.001-->
| 
| 
| [[NTSC]]
| 
| Integer multiple of the 59.94&nbsp;Hz (84000×) vertical refresh and the 15.734&nbsp;kHz (320×) horizontal scan rates
|-
| 5.0688
| 
| 57600
| 
| 
| UART clock allows integer division to common baud rates up to 14,400(×16×22) or 57,600(×8×11).
|-
| 5.120
| 
| 
| 
| {{Ya}}
| Allows binary division to 10&nbsp;kHz (2<sup>9</sup>×10&nbsp;kHz)
|-
| 5.185
| 
| 
| radio
| 
| Used in radio transceivers, clock for some microcontrollers
|-
| 5.5296
| 
| 115200
| 
| 
| UART clock allows integer division to common baud rates up to 115,200(×16×3) or 230,400(×8×3).
|-
| 5.6448
|
| 14400
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows binary division to [[44.1 kHz|44.1&nbsp;kHz]] (128×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. DSD128 bitrate (2× 2.8224&nbsp;MHz). Frequencies also used (multiplies of 5.6448) are 11.2896&nbsp;MHz, 16.9344&nbsp;MHz, 22.5972&nbsp;MHz, 33.8688&nbsp;MHz and 45.1584&nbsp;MHz.
|-
| 6.000
| [[USB]]
| 
| 
| 
| Common in low-speed (1.5Mbit/s) [[USB]] devices such as computer keyboards.
|-
| 6.063
| 
| 
| 
| 
| Reference clock for some 390&nbsp;MHz transmitters and receivers, e.g. [[garage door opener]]s. (Alternative frequencies for the same chipsets: 4.8970&nbsp;MHz for 315.00&nbsp;MHz, 6.4983&nbsp;MHz for 418.00&nbsp;MHz, 6.7458&nbsp;MHz for 433.92&nbsp;MHz; swapping them can swap the band.)
|-
| 6.144
| 
| 38400
| audio
| {{Ya}}
| Digital audio systems - [[digital audio tape|DAT]], [[MiniDisc]], [[sound cards]]; 128×48&nbsp;kHz (2<sup>7</sup>×48&nbsp;kHz). UART clock allows integer division to common baud rates up to 38,400(×16×10) or 256,000(×8×3).
|-
| 6.176
| [[Digital Signal 1|DS1]]
| 
| 
| 
| 4×1.544, the bit clock for [[Digital Signal 1|DS1]] systems (±32 ppm, ANSI T1.102). Available as TCXO and OCXO.
|-
| 6.400
| 
| 
| 
| 
| Binary multiple of 100&nbsp;kHz (64×100&nbsp;kHz), 50&nbsp;kHz, 25&nbsp;kHz, 12.5&nbsp;kHz. Half of the common standard 12.8&nbsp;MHz.
|-
| 6.4512
| 
| 115200
| 
| 
| 21×307.2&nbsp;kHz; UART clock allows integer division to common baud rates up to 57,600(×16×7) or 115,200(×8×7). See also 3×, 19.3536&nbsp;MHz.
|-
| 6.480
| [[Synchronous optical networking|SONET]]
| 28800
| 
| 
| Used to generate (×8) 51.84&nbsp;MHz, the [[Synchronous optical networking|SONET]] STS-1 frequency (with accuracy of 20 =ppm).<ref name=using/>
|-
| 6.4983
| 
| 
| 
| 
| Reference clock for some 418&nbsp;MHz transmitters and receivers, e.g. TV remote extenders or wireless sensors. (Alternative frequencies for the same chipsets: 4.8970&nbsp;MHz for 315.00&nbsp;MHz, 6.0630&nbsp;MHz for 390&nbsp;MHz, 6.7458&nbsp;MHz for 433.92&nbsp;MHz; swapping them can swap the band.)
|-
| 6.5536
| 
| 
| 
| 
| Allows binary division to 100&nbsp;Hz (65,536×100&nbsp;Hz, or 2<sup>16</sup>×100&nbsp;Hz); used also in [[red box (phreaking)|red box]]es
|-
| 6.6128
| 
| 
| radio (ISM)
| 
| Oscillator for 433.92&nbsp;MHz FSK/ASK superheterodyne receivers with 10.7&nbsp;MHz intermediate frequency (common ISM band use for small RF remote controls), multiplied 64× (6.6128×64+10.7=433.92) <ref name="maximintegrated.com"/>
|-
| 6.7458
| 
| 
| 
| 
| Reference clock for some 433.92&nbsp;MHz [[ISM band]] transmitters and receivers, e.g. wireless sensors. (Alternative frequencies for the same chipsets: 4.8970&nbsp;MHz for 315.00&nbsp;MHz, 6.0630&nbsp;MHz for 390&nbsp;MHz, 6.4983&nbsp;MHz for 418.00&nbsp;MHz; swapping them can swap the band.) Available as TCXO.
|-
| 6.750
| 
| 
| [[SDTV]]
| 
| [[SDTV]] NTSC 4:3 pixel clock (352×480i@29.97)
|-
| 7.023
| [[Amateur Radio]]
|
|
|
| [[Continuous Wave|CW]] Paradise in [[China]]. A common [[QRP operation|QRP]] [[frequency]] ([[40-meter band]]).<ref>{{Cite web|url=http://www.eham.net/ehamforum/smf/index.php?topic=66440.msg433549#msg433549|title=EHam.net}}</ref> Used with Pixie QRPP transceiver. Other less common frequencies are 7.030 (QRP, digital), 7.035, 7.040, 7.045, 7.048, 7.050, 7.055 (SKKC), 7.060, 7.070 (digital), 7.110 (QRP), 7.114, 7.122&nbsp;MHz. 
|-
| 7.15909
| 
| 
| [[NTSC]]
| 
| NTSC M color subcarrier (2×3.579545&nbsp;MHz)
|-
| 7.200
| DARC
| 1800
| 
| 
| UART clock allows integer division to common baud rates up to 1,800(×16×250) or 7,200(×8×125). Audio clock allows integer division for 48 / 96 ksps. Half of the more common 14.4&nbsp;MHz. Reference clock for [[Data Radio Channel|DARC]].
|-
| 7.3728
| 
| 460800
| 
| 
| UART clock allows integer division to common baud rates up to 460,800(×16×1) or 921,600(×8×1).
|-
| 7.600
|
|
| Radio
|
| PLL clock for pilot tone (400×19&nbsp;kHz) in FM stereo.
|-
| 8.000
| [[Controller Area Network|CAN]]
| 
| 
| 
| Used in [[Controller Area Network|CAN]] bus systems and with many small microcontroller systems. Common general microcontroller frequency (i.e. [[STM32#Nucleo boards|STM32 Nucleo]] boards, 3.3V [[AVR microcontrollers|AVR]]-based [[Arduino]] boards). Common as cheap [[ceramic resonator]]s where frequency stability is less concern than cost.
|-
| 8.184
| [[GPS]]
| 
| 
| 
| Half the 16.368&nbsp;MHz frequency; same use in different chipsets. 8 times the 1.023&nbsp;MHz C/A [[GPS signals|GPS signal]] chipping rate. Multiplied by 192.5 to get the 1575.42&nbsp;MHz [[GPS signals|L1 frequency]] and multiplied by 150 to get the 1227.60&nbsp;MHz L2 frequency. 
|-
| 8.192
| [[ISDN]]
| 256000
| audio
| {{Ya}}
| Allows binary division to 1&nbsp;kHz (2<sup>13</sup>×1&nbsp;kHz). Used in ISDN systems. Used in OKI Speech Processor. Common audio clock, 256×32&nbsp;kHz (see also 11.2896, 12.288, 16.384, 18.4323, 22.5792, 24.576&nbsp;MHz). Typical TDM/PCM audio interface clock, 1/6 of 49.152&nbsp;MHz.<ref>{{Cite web|url=https://patents.google.com/patent/US10044456B1/en|title = Clock generation with non-integer clock dividing ratio}}</ref>
|-
| 8.388608
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>23</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 8.4672
| 
| 1800
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows integer division to [[44.1 kHz|44.1&nbsp;kHz]] (192×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. UART clock allows integer division to common baud rates up to 1,800(×16×294) or 7,200(×8×147). Frequencies also used are 11.2896&nbsp;MHz, 16.9344&nbsp;MHz, 22.5972&nbsp;MHz, 33.8688&nbsp;MHz and 45.1584&nbsp;MHz.
|-
| 8.6436
| 
| 
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows integer division to [[44.1 kHz|44.1&nbsp;kHz]] (196×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. Frequencies also used are 4.3218&nbsp;MHz and 17.2872&nbsp;MHz.
|-
| 8.664
| [[Radio Data System|RDS]]
| 
| 
| 
| The [[Radio Data System|RDS]] signal bit rate is at 1.1875&nbsp;kbit/s. While the frequency of 4.332&nbsp;MHz is the most commonly used crystal resonator, its multiples (2×4.332&nbsp;MHz = 8.664&nbsp;MHz or 4×4.332&nbsp;MHz = 17.328&nbsp;MHz) have been used also.
|-
| 8.86724<br />8.867238
| 
| 
| [[PAL]]
| 
| PAL B/G/H color subcarrier (2×4.433618&nbsp;MHz)
|-
| 9.000
| 
| 
| [[SDTV]]
| 
| [[SDTV]] PAL/NTSC 16:9 pixel clock (480×480i@29.97, 480×576i@25)
|-
| 9.216
| 
| 576000
| audio
| {{Ya}}
| UART clock allows integer division to common baud rates up to 115,200(×16×5) or 576,000(×16×1). Audio clock allows integer division for 48 / 96 / 192 ksps. Allows integer division to 1024&nbsp;kHz and binary division to lower frequencies that are whole multiples of 1&nbsp;Hz. Master clock for some Japanese variants of [[DOCSIS]].
|-
| 9.29063
| 
| 
| radio (ISM)
| 
| Oscillator for 308&nbsp;MHz FSK/ASK superheterodyne receivers with 10.7&nbsp;MHz intermediate frequency (less common band used for small RF remote controls), multiplied 32× (9.29063*32+10.7=308) <ref name="datasheets.maximintegrated.com">https://datasheets.maximintegrated.com/en/ds/MAX7042.pdf {{Bare URL PDF|date=March 2022}}</ref>
|-
| 9.50939
| 
| 
| radio (ISM)
| 
| Oscillator for 315&nbsp;MHz FSK/ASK superheterodyne receivers with 10.7&nbsp;MHz intermediate frequency (common Chinese ISM band used for small RF remote controls), multiplied 32× (9.50939*32+10.7=315) <ref name="datasheets.maximintegrated.com"/>
|-
| 9.54545
| 
| 
| [[NTSC]]
| 
| 2/3 of the 14.31818&nbsp;MHz NTSC clock, 1/3 of the 28.636&nbsp;MHz clock; common clock for microcontrollers and older processors. Exactly 210/22 &nbsp;MHz.
|-
| 9.600
| 
| 4800
| 
| 
| UART clock allows integer division to common baud rates up to 4,800(×16×125) or 9,600(×8×125). Available as TCXO and OCXO. Used in 19.2 and 48&nbsp;MHz PLL generators. Can be used as seed clock for 48 and 60&nbsp;GHz PLL oscillators and in frequency synthesizers for mobile radio as the common channel spacings can be easily derived.<ref>http://pira.cz/pdf/UMA1014.pdf {{Bare URL PDF|date=March 2022}}</ref>
|-
| 9.8304
| [[CDMA]]
| 38400
| 
| 
| Used in [[CDMA]] systems (2×4.9152&nbsp;MHz); divided to 1.2288&nbsp;MHz baseband frequency. UART clock allows integer division to common baud rates up to 38,400(×16×16) or 76,800(×8×16).
|-
| 9.84375
| 
| 
| radio (ISM)
| 
| Used as clock in some 315&nbsp;MHz remote fob and IoT transmitters (multiplied by 32); 13.560&nbsp;MHz used for 433.92&nbsp;MHz
|-
| 9.900
| 
| 
| [[SDTV]]
| 
| [[SDTV]] NTSC pixel clock (528×480i@29.97)
|-
| 10.000
| 
| 
| 
| 
| [[Power of 10|10<sup>7</sup>]] allows decade division to 1&nbsp;Hz and 1&nbsp;kHz. Common standard frequency. Commonly available as TCXO, the most common OCXO and GPS-disciplined oscillator available. Common stratum 3 [[Network Time Protocol]] frequency.<ref name="maxim-icic">[http://www.maxim-ic.com/quick_view2.cfm/qv_pk/5408 QuickView - DS4026 10MHz to 51.84MHz TCXO]. Maxim-ic.com. Retrieved on 2010-02-08.</ref> Common general microcontroller frequency. Common as cheap [[ceramic resonator]]s where frequency stability is less concern than cost.
|-
| 10.106
| [[Amateur Radio]]
|
|
|
| A common [[QRP operation|QRP]] [[frequency]] ([[30-meter band]]). Other crystals are 10.116 (QRP), 10.118, 10.120 (SKKC), 10.140 (digital) MHz. See also 7.025&nbsp;MHz.
|-
| 10.125
| 
| 
| [[SDTV]]
| 
| [[SDTV]] PAL/NTSC pixel clock (544×480i@29.97, 544×576i@25)
|-
| 10.230
| [[GPS]]
| 
| 
| 
| Found in some [[GPS]] receivers. Equals the P(Y) [[GPS signals|GPS signal]] chipping rate. 10 times the 1.023&nbsp;MHz C/A GPS signal chipping rate. Multiplied by 154 to get the 1575.42&nbsp;MHz [[GPS signals|L1 frequency]] and multiplied by 120 to get the 1227.60&nbsp;MHz L2 frequency. Available as OCXO and TCXO.
|-
| 10.240
| [[DOCSIS]]/[[TD-SCDMA]]
| 
| 
| {{Ya}}
| Allows binary division to 10&nbsp;kHz (2<sup>10</sup>×10&nbsp;kHz). Common as a clock in [[CB radio]] PLL [[frequency synthesizer]]s to generate the 5&nbsp;kHz or 10&nbsp;kHz reference signal.<ref>[http://www.glodark.co.uk/cb/fsynth.htm CB Radio Frequency Synthesis explanation]. Glodark.co.uk. Retrieved on 2010-02-08.</ref> Used in frequency synthesizers in some cordless phones and in many radio frequency transceivers. Master clock for [[DOCSIS|DOCSIS/EuroDOCSIS]]. Used in [[cable modem termination system]]s. Used to derive symbol and chip rate in conventional [[TD-SCDMA]] systems. Available as OCXO and TCXO.
|-
| 10.245
| [[FM radio]]
| 
| 
| 
| Used in radio receivers; mixes with 10.7&nbsp;MHz [[intermediate frequency]] (IF) yielding 455&nbsp;kHz signal, a common second [[intermediate frequency|IF]] for [[FM radio]]<ref>[http://www.dbugman.com/handbook/tscmh5.html TSCM Handbook - Chapter 5]. Dbugman.com. Retrieved on 2010-02-08.</ref>
|-
| 10.368
| [[DECT]]
| 14400
| 
| 
| Reference clock for DECT phones. Available as TCXO. Other frequencies are 13.824 and 20.736&nbsp;MHz. UART clock allows integer division to common baud rates up to 14,400(×16×45) or 28,800(×8×45)
|-
| 10.416667
| [[Ethernet]]
| 
| 
| 
| Multiplied by 12 to 125&nbsp;MHz [[Gigabit Ethernet]] [[GMII]] GTXCLK clock, [[FDDI]] clock
|-
| 10.70
| [[FM radio]]
| 
| radio (filter)
| 
| Most common crystal or [[ceramic resonator]] for first [[intermediate frequency]] filter in FM radio; common in other applications due to ubiquity and low cost, filter bandwidth varies (e.g. ±250/230/180/150/110&nbsp;kHz to both sides from the 10.7&nbsp;MHz frequency)
|-
| 11.0592
| 
| 230400
| 
| 
| UART clock allows integer division to common baud rates up to 230,400(×16×3) or 460,800(×8×3); common clock for [[Intel 8051]] microprocessors<ref name=r8052>[http://www.8052.com/tuttimng.phtml 8051 Tutorial: Instruction Set, Timing, and Low-Level Information] {{Webarchive|url=https://web.archive.org/web/20100103134333/http://8052.com/tuttimng.phtml |date=2010-01-03 }}. 8052.com. Retrieved on 2010-02-08.</ref>
|-
| 11.2896
|
| 14400
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows binary division to {{nobr|[[44.1 kHz]]}} (256×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. DSD256 bitrate (4x2.8224&nbsp;MHz). Frequencies also used are 16.9344&nbsp;MHz, 22.5972&nbsp;MHz, 33.8688&nbsp;MHz and 45.1584&nbsp;MHz. UART clock allows integer division to common baud rates up to 14,400(×16×49) and 28,800(×8×49).
|-
| 11.454544
| [[teletext]]
| 
| 
| 
| Used in some [[teletext]] circuits; 2×5.727272&nbsp;MHz (clock frequency of NTSC M teletext; PAL B uses 6.9375&nbsp;MHz, SECAM uses 6.203125&nbsp;MHz, PAL G uses 6.2031&nbsp;MHz, and PAL I uses 4.4375&nbsp;MHz clock)
|-
| 11.520
| 
| 28800
| 
| 
| UART clock allows integer division to common baud rates up to 28,800(×16×25) or 57,600(×8×25).
|-
| 12.000
| [[USB]]/[[Controller Area Network|CAN]]
| 
| 
| 
| Used in [[USB]] 1.0 and 2.0 systems (with accuracy of 500 ppm) as the reference clock for the full-speed PHY rate of 12 Mbit/s, or multiplied up using a PLL to clock high speed PHYs at 480 Mbit/s; common clock for [[Intel 8051]] microprocessors;<ref name=r8052/> also used in [[Controller Area Network|CAN]] bus systems. Common general microcontroller frequency. Common as cheap [[ceramic resonator]]s where frequency stability is less concern than cost.
|-
| 12.272727
| 
| 
| [[SDTV]]
| 
| Clock rate for exactly square pixels in interleaved 4:3 640×480i@29.97 NTSC video (<math>\tfrac{135}{11}</math>&nbsp;MHz). In practice the more commonly available 12.288&nbsp;MHz frequency is close enough for most applications. 
|-
| 12.288
| 
| 76800
| audio
| {{Ya}}
| Digital audio systems - [[digital audio tape|DAT]], [[MiniDisc]], [[sound card]]s; 256×48&nbsp;kHz (2<sup>8</sup>×48&nbsp;kHz). UART clock allows integer division to common baud rates up to 76,800(×16×20) or 256,000(×16×3)
|-
| 12.352
| [[Digital Signal 1|DS1]]
| 
| 
| 
| 8x1.544, the bit clock for [[Digital Signal 1|DS1]] systems (±32 ppm, ANSI T1.102). Available as TCXO and OCXO.
|-
| 12.40625
| [[teletext]]
| 
| 
| 
| Used in some [[teletext]] circuits; 2×6.203125&nbsp;MHz (clock frequency of SECAM teletext; PAL B uses 6.9375&nbsp;MHz, NTSC M uses 5.727272&nbsp;MHz, PAL G uses 6.2031&nbsp;MHz, and PAL I uses 4.4375&nbsp;MHz clock)
|-
| 12.72813
| 
| 
| radio (ISM)
| 
| Oscillator for 418&nbsp;MHz FSK/ASK superheterodyne receivers with 10.7&nbsp;MHz intermediate frequency (less common band used for small RF remote controls), multiplied 32x (12.72813x32+10.7=418) <ref name="datasheets.maximintegrated.com"/>
|-
| 12.800
| 
| 
| 
| 
| Common standard frequency, common reference clock; binary multiple of 100&nbsp;kHz (128×100&nbsp;kHz), 50&nbsp;kHz, 25&nbsp;kHz, 12.5&nbsp;kHz. Commonly available as TCXO and OCXO. Common [[stratum 3]] frequency.<ref name="maxim-icic"/>
|-
| 12.9024
| 
| 115200
| 
| 
| UART clock allows integer division to common baud rates up to 115,200(×16×7) or 230,400(×8×7)
|-
| 12.960
| 
| 1800
| 
| 
| UART clock allows integer division to common baud rates up to 1,800(×16×450) or 7,200(×8×225)
|-
| 13.000
| [[GSM]]/[[UMTS]]
| 
| 
| 
| Commonly used as a reference clock for [[GSM]] and [[UMTS]] handsets. (13&nbsp;MHz is exactly 48 times the GSM bit rate). Commonly available as TCXO and OCXO.
|-
| 13.22563
| 
| 
| radio (ISM)
| 
| Oscillator for 433.92&nbsp;MHz [[Frequency-shift keying|FSK]]/[[Amplitude-shift keying|ASK]] [[superheterodyne]] receivers with 10.7&nbsp;MHz [[intermediate frequency]] (less common band used for small RF remote controls), multiplied 32x (13.22563*32+10.7=433.12) <ref name="datasheets.maximintegrated.com"/>
|-
| 13.500
| 
| 
| [[SDTV]]
| 
| Master clock for [[PAL]]/[[NTSC]] DVD players, Digital TV receivers, etc. (13.5&nbsp;MHz is an exact multiple of the [[PAL]] and [[NTSC]] line frequencies); pixel clock for 4:3 [[SDTV]] PAL/NTSC (720×480i@29.97, 720×576i@25, 352×480p@59.94). CCIR-601 PAL samplerate (864×625 resolution incl. blanking, or 720×576 visible), CCIR-601 NTSC samplerate (858×525 incl. blanking, 720×480 visible)
|-
| 13.5168
| 
| 76800
| 
| 
| UART clock allows integer division to common baud rates up to 76,800(×16×11)
|-
| 13.560
| [[RFID]]
| 
| 
| 
| Common contactless smartcard frequency ([[ISO/IEC 14443]]). Also used as clock in some 433.92&nbsp;MHz remote fob transmitters (multiplied by 32); 9.84375&nbsp;MHz used for 315&nbsp;MHz
|-
| 13.824
| [[DECT]]
| 57600
| 
| 
| Reference clock for DECT phones. Available as TCXO. UART clock allows integer division to common baud rates up to 57,600(×16×15) or 576,000(×8×3). Other frequencies are 10.368 and 20.736&nbsp;MHz.
|-
| 13.875
| [[teletext]]
| 
| 
| 
| Used in some [[teletext]] circuits; 2×6.9375&nbsp;MHz (clock frequency of PAL B teletext; SECAM uses 6.203125&nbsp;MHz, NTSC M uses 5.727272&nbsp;MHz, PAL G uses 6.2031&nbsp;MHz, and PAL I uses 4.4375&nbsp;MHz clock)
|-
| 14.048
| [[Amateur Radio]]
|
|
|
| A common amateur radio [[frequency]] ([[20-meter band]]). Other crystals are 14.050 (SKCC), 14.060 (QRP), 14.070 (digital) MHz. See also 7.025&nbsp;MHz.
|-
| 14.112
| 
| 1800
| audio
| 
| Digital audio systems - 294×48&nbsp;kHz, 320×44.1&nbsp;kHz. UART clock allows integer division to common baud rates up to 1,800(×16×490) or 7,2000(×8×245). Available as TCXO.
|-
| 14.250
| [[FM radio]]
| 
| [[PAL]]
| 
| used as sampling frequency for [[analog-to-digital converter|ADCs]] for digitizing the 10.7&nbsp;MHz [[intermediate frequency]] in [[software-defined radio]] implementations of AM/FM radio receivers.<ref>[http://www.bluespot.co.uk/digiceiver.asp Blaupunkt digiceiver technology] {{webarchive|url=https://web.archive.org/web/20090708012219/http://www.bluespot.co.uk/digiceiver.asp |date=2009-07-08 }}. Bluespot.co.uk. Retrieved on 2010-02-08.</ref> Pixel clock of some PAL CCD cameras (raw image resolution of 912×625).<ref name="keystoneautomation1">[http://keystoneautomation.com/images/stories/pdfs/datasheets_cv-m50.pdf CV-M50.indd] {{webarchive|url=https://web.archive.org/web/20110713144828/http://keystoneautomation.com/images/stories/pdfs/datasheets_cv-m50.pdf |date=2011-07-13 }} Industrial Monochrome CCD Camera</ref> Used in PAL version in some early Apple computers, e.g. [[Apple II series|Apple II Europlus]].
|-
| 14.318182
| 
| 
| [[NTSC]]
| 
| NTSC M color subcarrier (4×3.579545&nbsp;MHz). Common seed clock for modern PC motherboard clock generator chips, clock for [[Industry Standard Architecture|ISA]] bus, also common on [[Color Graphics Adapter|CGA]] and [[VGA card]]s and in some 8-bit computers. Exactly 315/22&nbsp;MHz. 4f(sc) sampling for NTSC or 525/60 (raw image size 910×525, visible 768×475), SMPTE 244M standard.
|-
| 14.350
| 
| 
| [[NTSC]]
| 
| Pixel clock of some NTSC CCD cameras.<ref name="keystoneautomation1"/>
|-
| 14.400
| [[Personal Digital Cellular|PDC]]
| 7200
| 
| 
| UART clock allows integer division to common baud rates up to 7,200(×16×125) or 14,400(×8×125). Also a reference clock for [[Personal Digital Cellular|PDC]] clock. Reference clock of some consumer [[GPS]] receivers.<ref name="autogenerated1">[http://www.cel.com/pdf/datasheets/upb1009k.pdf UPB1009K]  NEC's low power GPS RF receiver bipolar analog + integrated circuit
</ref>
|-
| 14.7456
| 
| 921600
| 
| 
| UART clock allows integer division to common baud rates up to 921,600(×16×1); common clock for small microcontrollers
|-
| 14.750
| 
| 
| [[SDTV]]
| 
| Clock rate for exactly square pixels in [[SDTV]] PAL 4:3 interleaved 768×576i@25 video (<math>\tfrac{59}{4}</math>&nbsp;MHz). In practice the more commonly available 14.7456&nbsp;MHz frequency is close enough for most applications.
|-
| 14.850
| 
| 
| 
| 
| Used in some transceivers and cellular radios as a reference clock for frequency synthesis. Available as TCXO.
|-
| 15.000
| 
| 
| 
| 
| Used as clock in [[ZX8301]] computer (divided to 7.5&nbsp;MHz). Frequency used in photoacoustic imaging. Sometimes available as OCXO. Used in dual-frequency 315/390&nbsp;MHz RF key fobs (multiplied by 21 or 26).<ref>https://datasheets.maximintegrated.com/en/ds/MAX7058EVKIT.pdf {{Bare URL PDF|date=March 2022}}</ref>
|-
| 15.360
| [[3G]]
| 38400
| 
| {{Ya}}
| UART clock allows integer division to common baud rates up to 38,400(×16×25) or 128,000(×8×15). Also used as a [[3G]] reference clock.<ref name="ed-china1">[http://www.ed-china.com/ARTICLES/2006JUN/4/2006JUN23_MC_CT_TS_55.PDF Clock Interface Trends from GSM/EDGE to W-CDMA] {{webarchive|url=https://web.archive.org/web/20100215193246/http://www.ed-china.com/ARTICLES/2006JUN/4/2006JUN23_MC_CT_TS_55.PDF |date=2010-02-15 }} Gary Levy, Silicon Laboratories Inc.</ref> Used as reference clock in some [[Bluetooth]] systems.
|-
| 15.600
| 
| 
| 
| 
| Used in [[Kenwood Corporation|Kenwood]] TS-590 transceivers. Audio clock allows integer division for 48 ksps. Available as TCXO.
|-
| 16.000
| [[Controller Area Network|CAN]]
| 
| [[Hercules Graphics Card|HGC]]
| 
| Used in [[Controller Area Network|CAN]] bus systems, some [[USB]] devices. 2.4&nbsp;GHz ISM transceivers. Common general microcontroller frequency (i.e. Arduino [[Arduino Uno|Uno]] and [[Arduino Nano|Nano]] boards). Common as cheap [[ceramic resonator]]s where frequency stability is less concern than cost. Pixel clock for Hercules Graphics Card. Also used for ZigBee, Bluetooth and BLE, WiFi.<ref name="jauch1"/>
|-
| 16.200
| 
| 
| [[HDTV]]
| 
| Sampling clock for [[Multiple sub-Nyquist sampling encoding|MUSE]] HDTV systems (). Rarely used as reference clock in some [[Bluetooth]] systems.
|-
| 16.257
| 
| 
| [[Enhanced Graphics Adapter|EGA]]
| 
| Pixel clock generator in [[IBM Monochrome Display Adapter|MGA]] and [[Enhanced Graphics Adapter|EGA]] video cards (640×350@60&nbsp;Hz)<ref>http://neil.franklin.ch/Projects/SoftVGA/Design/Video_Signals</ref>
|-
| 16.367600<br />16.367667<br />16.368000
| [[GPS]]
| 
| 
| 
| Commonly used for down-conversion and sampling in [[GPS]]-receivers. Generates [[intermediate frequency]] signal at 4.092&nbsp;MHz. 16.3676 or 16.367667&nbsp;MHz are sometimes used instead of 16.368&nbsp;MHz to avoid perfect lineup between sampling frequency and GPS [[CDMA|spreading code]]. 16.368&nbsp;MHz is a reference clock of some consumer [[GPS]] receivers.<ref name="autogenerated1"/> 16.368&nbsp;MHz is 16 times the 1.023&nbsp;MHz C/A [[GPS signals|GPS signal]] chipping rate; multiplied by 96.25 to get the 1575.42&nbsp;MHz [[GPS signals|L1 frequency]] and multiplied by 75 to get the 1227.60&nbsp;MHz L2 frequency. 
|-
| 16.369
| [[GPS]]
| 
| 
| 
| Reference clock for some [[GPS]] systems. Available as TCXO.<ref name="foxonline1">[http://www.foxonline.com/pdfs/fox923gp.pdf SMD TCXO/VCTCXO for GPS Applications]</ref>
|-
| 16.375
| 
| 
| [[SDTV]]
| 
| [[SDTV]] [[NTSC]] 16:9 pixel clock (864×480i@29.97), square pixels (854×480 would be ideal, 864×480 is close enough and a multiple of 16 and 32 for MPEG compression blocks)
|-
| 16.384
| 
| 256000
| 
| {{Ya}}
| Allows binary division to 1&nbsp;kHz (2<sup>14</sup>×1&nbsp;kHz). Reference clock of some consumer [[GPS]] receivers.<ref name="autogenerated1"/> Common audio clock, 256×64&nbsp;kHz, 512×32&nbsp;kHz (see also 8.192, 11.2896, 12.288, 18.432, 22.5792, 24.576&nbsp;MHz). Commonly available as TCXO and OCXO.
|-
| 16.5888
| 
| 115200
| 
| 
| UART clock allows integer division to common baud rates up to 115,200(×16×9) or 230,400(×8×9).
|-
| 16.67
| 
| 
| 
| 
| Core speed of some microcomputers (relatively common in [[Motorola 68000]] family); bus clock; double to 33.33&nbsp;MHz, quadruple to 66.67&nbsp;MHz, multiply by 6 to 100&nbsp;MHz; [[Intel APIC Architecture|IOAPIC]] clock speed, half the PCI bus frequency
|-
| 16.777216
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>24</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 16.800
| 
| 1200
| 
| 
| Common standard reference frequency for PLL circuits in radio transmitters and receivers, commonly used for frequency synthesis with adjustment in 2.5, 5 or 6.25&nbsp;kHz steps (6720×5&nbsp;kHz, 3360×5&nbsp;kHz or 2688×5.25&nbsp;kHz). UART clock allows integer division to common baud rates up to 1,200(×16×875) or 2,400(×8×875). Commonly available as TCXO, VCXO and VCTCXO. Used as reference clock in some [[Bluetooth]] systems. Reference clock for some [[GPS]] systems.<ref name="foxonline1"/>
|-
| 16.9344
| 
| 7200
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows integer division to [[44.1 kHz|44.1&nbsp;kHz]] (384×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. UART clock allows integer division to common baud rates up to 7,200(×16×147) or 14,400(×8×147). 6x2.8224&nbsp;MHz (DSD64 bitrate). Frequencies also used are 11.2896&nbsp;MHz, 22.5972&nbsp;MHz, 33.8688&nbsp;MHz and 45.1584&nbsp;MHz.
|-
| 17.2032
| [[USB]]
| 76800
| audio
|
| PLL conversion by 10/7 to 24.576&nbsp;MHz and by 21/16 = 22.5792&nbsp;MHz, which are 256× audio sampling frequencies 48&nbsp;kHz and 44.1&nbsp;kHz, respectively.<ref>{{Cite web|url=http://electronicdesign.com/embedded/achieving-bit-perfect-usb-audio|title=Achieving Bit-Perfect USB Audio|website=electronicdesign.com|date=3 August 2016 |access-date=2016-11-14}}</ref>  UART clock allows integer division to common baud rates up to 76,800(×16×14).
|-
| 17.2872
| 
| 
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows integer division to [[44.1 kHz|44.1&nbsp;kHz]] (392×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. Frequencies also used are 4.3218&nbsp;MHz and 8.6436&nbsp;MHz.
|-
| 17.328
| [[Radio Data System|RDS]]
| 
| 
| 
| The [[Radio Data System|RDS]] signal bit rate is at 1.1875&nbsp;kbit/s. While the frequency of 4.332&nbsp;MHz is the most commonly used crystal resonator, its multiples (2×4.332&nbsp;MHz = 8.664&nbsp;MHz or 4×4.332&nbsp;MHz = 17.328&nbsp;MHz) have been used also.
|-
| 17.664
| [[DSL]]
| 9600
| 
| 
| UART clock allows integer division to common baud rates up to 9,600(×16×115) or 19,200(×8×115); [[DSL]] clock: 17.664&nbsp;MHz ([[VDSL]]) ... 8×2.208&nbsp;MHz ([[ADSL]] ADC sampling rate)
|-
| 17.734475
| 
| 
| [[PAL]]
| 
| PAL B/G/H color subcarrier (4×4.433618&nbsp;MHz); 4f(sc) sampling for PAL or 625/50, gives 1135×625 pixels incl. blankings, or 948×575 visible
|-
| 18.000
| 
| 
| [[SDTV]]/[[HDTV]]
| 
| [[SDTV]] PAL/NTSC pixel clock for 16:9 (960×480i@29.97, 480×480p@59.94, 960×576i@25, 480×576p@50)
|-
| 18.096
| [[Amateur Radio]]
|
|
|
| A [[WARC bands|WARC band]] (17-meter), QRP. Another crystal is 18.086&nbsp;MHz. See also 7.025&nbsp;MHz, 10.106&nbsp;MHz.
|-
| 18.432
| 
| 576000
| audio
| {{Ya}}
| UART clock allows integer division to common baud rates up to 230,400(×16×5) or 576,000(×16×2). Audio clock allows integer division for 48 / 96 / 192 ksps. Integer division for 50&nbsp;Hz and 60&nbsp;Hz.
|-
| 18.75
| [[Ethernet]]
| 
| 
| 
| Used to generate 75&nbsp;MHz (×4) and 150&nbsp;MHz (×8) clocks.
|-
| 18.816
| 
| 4800
| audio/[[Digital Audio Tape|DAT]]
| 
| Double the master channel bitrate clock. 9.408&nbsp;MHz, of [[Digital Audio Tape]] systems; 392×48&nbsp;kHz. The 9.408&nbsp;MHz clock is divided by 72, 18, 12, and 6 to obtain the pilot, first sync frequency, second sync frequency, and erase frequency. Available as TCXO.
|-
| 18.9375
| 
| 
| [[PAL]]
| 
| Common CCIR/PAL CCTV camera clock frequency (total frame size 1212×625, incl. blankings, @ 25&nbsp;Hz)
|-
| 19.069929<br />19.069930<br />19.069920<br />19.069900
| 
| 
| [[NTSC]]
| 
| Common EIA/NTSC CCTV camera clock frequency (total frame size 1212×525, incl. blankings, @29.97&nbsp;Hz)
|-
| 19.200
| [[3G]]
| 9600
| [[digital video broadcasting|DVB]]
| 
| UART clock allows integer division to common baud rates up to 9,600(×16×125) or 19,200(×8×125). Also used as a [[3G]] reference clock, due to being a least common multiple of [[W-CDMA]] [[chip rate]] 3.84&nbsp;MHz (5x) and 200&nbsp;kHz channel raster (96x).<ref name="ed-china1"/> Commonly available as TCXO and OCXO. Also used in some [[digital video broadcasting|DVB]] receiver chipsets. Reference clock of some consumer [[GPS]] receivers.<ref name="autogenerated1"/> Used as reference clock in some [[Bluetooth]] systems. Common [[stratum 3]] frequency.<ref name="maxim-icic"/> [[Raspberry Pi]] 3 (and earlier) main clock crystal (54&nbsp;MHz for Raspberry Pi 4), can be replaced with more accurate source (TCXO, OCXO, GPS-disciplined) if needed. Used in some DECT, GPS, BLE systems.<ref name="jauch1"/>
|-
| 19.3536<br />19.354
| 
| 115200
| 
| 
| 3×6.4512&nbsp;MHz; 63×307.2&nbsp;kHz; UART clock allows integer division to common baud rates up to 57,600(×16×7×3) or 115,200(×8×7×3).
|-
| 19.440
| [[Digital Signal 1|DS1/T1]]/[[E-carrier|E1]], [[Ethernet]]
| 1800
| 
| 
| Used in [[Digital Signal 1|DS1/T1]]/[[E-carrier|E1]] systems as a packet clock. Used as reference clock in some [[Bluetooth]] systems. Commonly available as TCXO and OCXO.  [[Gigabit Ethernet]], used to generate 77.76&nbsp;MHz (×4), 155.52&nbsp;MHz (×8), 311.04&nbsp;MHz (×16), 622.08&nbsp;MHz (×32).
|-
| 19.53125
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]], used to generate 78.125&nbsp;MHz (×4), 156.25&nbsp;MHz (×8), 312.5&nbsp;MHz (×16), 625&nbsp;MHz (×32); multiplies to 10&nbsp;GHz MAC-side bitrate, post-serdes; 156.25&nbsp;MHz = 1/66 of 10.3125&nbsp;GHz, 1/64 of 10.0&nbsp;GHz
|-
| 19.6608
| [[CDMA]]
| 76800
| 
| 
| Used in [[CDMA]] systems (4×4.9152); divided to 1.2288&nbsp;MHz baseband frequency; UART clock allows integer division to common baud rates up to 38,400(×16×32) or 76,800(×16×16).
|-
| 19.67
| 
| 
| [[SDTV]]
| 
| [[SDTV]] PAL 16:9 pixel clock (WSVGA 1024×576i@25), square pixels
|-
| 19.680
| [[CDMA]]
| 1200
| 
| 
| Used in [[CDMA]]([[IS-95]])/[[CDMA2000]] systems; divided to 1.2288&nbsp;MHz baseband frequency; Used as reference clock in some [[Bluetooth]] systems. Commonly available as TCXO.
|-
| 19.800
| [[CDMA]]
| 
| [[SDTV]]
| 
| Used in some [[CDMA]] systems. Used as reference clock in some [[Bluetooth]] systems. [[SDTV]] NTSC pixel clock (528×480p@59.94)
|-
| 20.000
| [[Ethernet]]
| 500000
| 
| 
| [[10 Mbit/s Ethernet]]. Commonly available as TCXO and OCXO. Common stratum 3 [[Network Time Protocol]] frequency.<ref name="maxim-icic"/> Common general microcontroller frequency. Common as cheap [[ceramic resonator]]s where frequency stability is less concern than cost. Allows binary division to 10&nbsp;MHz. Used in some WiFi and Bluetooth systems.<ref name="jauch1"/>
|-
| 20.141601
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]]. Used to generate 80.566406&nbsp;MHz (×4) or 161.132812&nbsp;MHz (×8), 1/128 and 1/64 of 10.3125&nbsp;GHz of copper Gigabit Ethernet wire bit rate
|-
| 20.25
| TV/[[Multiplexed Analogue Components|MAC]]
| 
| [[PAL]]/[[NTSC]]/[[SDTV]]
| 
| Common sampling rate of luma+chroma video components in the [[Multiplexed Analogue Components]] standard. Pixel clock for [[SDTV]] PAL/NTSC (544×480p@59.94, 544×576p@50).
|-
| 20.2752
| 
| 115200
| 
| 
| UART clock allows integer division to common baud rates up to 115,200(×16×11) or 230,400(×8×11).
|-
| 20.480
| 
| 256000
| 
| {{Ya}}
| Allows binary division to 10&nbsp;kHz (2<sup>11</sup>×10&nbsp;kHz). Commonly available as TCXO and OCXO.
|-
| 20.736
| [[DECT]]
| 28800
| 
| 
| Reference clock for DECT phones. Available as TCXO. Other frequencies are 10.368 and 13.824&nbsp;MHz.
|-
| 21.050
| [[Amateur Radio]]
|
|
|
| A common [[QRP operation|QRP]] [[frequency]] ([[15-meter band]]), SKCC. Other crystal is 21.060&nbsp;MHz. See also 7.025&nbsp;MHz.
|-
| 21.47727
| 
| 
| [[NTSC]]
| 
| NTSC M color subcarrier (6×3.579545&nbsp;MHz). Common seed clock for many older computer systems, e.g. the NTSC-region [[Nintendo Entertainment System|NES]], divided by 12 to CPU clock (1.789773&nbsp;MHz); see 26.601712&nbsp;MHz for PAL NES systems.<ref name="wiki.nesdev.com">{{Cite web|url=https://wiki.nesdev.com/w/index.php/Clock_rate|title = Cycle reference chart - Nesdev wiki}}</ref>
|-
| 22.1184
| 
| 460800
| 
| 
| UART clock allows integer division to common baud rates up to 460,800(×16×3) or 921600(×8×3). Twice the 11.0592&nbsp;MHz frequency.
|-
| 22.5792
|
| 28800
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows binary division to [[44.1 kHz|44.1&nbsp;kHz]] (512×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. DSD512 bitrate (8x2.8224&nbsp;MHz). Frequencies also used are 11.2896&nbsp;MHz, 16.9344&nbsp;MHz, 33.8688&nbsp;MHz and 45.1584&nbsp;MHz. UART clock allows integer division to common baud rates up to 28,800(×16×49) or 57,800(×8×49).
|-
| 22.625
| 
| 
| 
| 
| Used in [[Yaesu FT-817]], FT-857, and FT-897 transceiver. Available as TCXO.
|-
| 23.104
| [[GPS]]
| 
| 
| 
| Reference clock for some [[GPS]] systems. Available as TCXO.<ref name="foxonline1"/>
|-
| 23.9616
| 
| 115200
| 
| 
| UART clock allows integer division to common baud rates up to 115,200(×16×13) or 230,400(×8×13).
|-
| 24.000
| [[USB]] [[Bluetooth headphones]]
| 500000
| 
| 
| High-speed USB (24&nbsp;MHz × 20 = 480Mbit/s); LCD monitor some MCU also Bluetooth headphones. Used in some WiFi, Bluetooth and BLE systems.<ref name="jauch1"/>
|-
| 24.54
| 
| 
| [[SDTV]]
| 
| [[SDTV]] NTSC 4:3 pixel clock (640×480p@59.94)
|-
| 24.5535
| [[GPS]]
| 
| 
| 
| Reference clock for some [[GPS]] systems. Available as TCXO.<ref name="foxonline1"/> Almost 24 times the 1.023&nbsp;MHz C/A code chipping rate.
|-
| 24.576
| FireWire 
| 256000
| audio
| {{Ya}}
| Digital audio systems - [[digital audio tape|DAT]], [[MiniDisc]], [[AC'97]], [[sound card]]s; 512×48&nbsp;kHz (2<sup>9</sup>×48&nbsp;kHz); also used as bus reference clock in [[FireWire]] systems (with accuracy of 100 ppm). 3x8.192&nbsp;MHz. 49.1520&nbsp;MHz (2x24.576) also used. Also a crystal for systems handling CCIR-601 SDTV video (here see also 26.8&nbsp;MHz).
|-
| 24.704
| [[Digital Signal 1|DS1]]
| 
| 
| 
| 16x1.544, the bit clock for [[Digital Signal 1|DS1]] systems (±32 ppm, ANSI T1.102). Available as TCXO and OCXO.
|-
| 24.906
| [[Amateur Radio]]
|
|
|
| A common [[QRP operation|QRP]] [[frequency]] ([[12-meter band]]). See also 7.025&nbsp;MHz.
|-
| 25.000
| [[Ethernet]]
| 
| 
| 
| [[Fast Ethernet]] [[Media Independent Interface|MII]] clock (100&nbsp;Mbit/s/4-bit [[nibble]]) (with accuracy of 100 ppm); also multiplied by 5 to 125&nbsp;MHz Also used on some laptop optical drives [[Gigabit Ethernet]] [[GMII]] GTXCLK clock, [[FDDI]] clock; used as input for 100&nbsp;MHz [[PCI Express]] clock generators<ref name=using>{{Cite web |url=http://www.idt.com/products/getDoc.cfm?docID=18461957 |title=Using clock generation chips to replace crystals and oscillators |access-date=2009-12-24 |archive-url=https://web.archive.org/web/20110713003718/http://www.idt.com/products/getDoc.cfm?docID=18461957 |archive-date=2011-07-13 |url-status=dead }}</ref> Used in some ISM radio systems.<ref name="jauch1"/>
|-
| 25.175
| 
| 
| [[Video Graphics Array|VGA]]
| 
| Common [[Video Graphics Array]] pixel clock (i.e., 320/640×200/350/400@70 (320×200@70&nbsp;Hz, 640×200@70, 320×350@70, 640×350@70, 640×400@70, VGA 640×480@60), all 31.46875&nbsp;kHz horizontal)<ref>[http://www.tinyvga.com/vga-timing VGA Signal Timing]</ref><ref name="hinner1"/> 
|-
| 25.8048
| 
| 230400
| 
| 
| UART clock allows integer division to common baud rates up to 230,400(×16×7) or 460,800(×8×7)
|-
| 26.000
| [[GSM]]/[[UMTS]]
| 
| [[digital video broadcasting|DVB]] 
| 
| Commonly used as a reference clock for [[GSM]] and [[UMTS]]/[[3G]] handsets. (26&nbsp;MHz is exactly 96 times the GSM bit rate). Commonly available as TCXO and OCXO.<ref name="ed-china1"/> Also used in some [[digital video broadcasting|DVB]] receiver chipsets used on portable DVD players. Reference clock of some consumer [[GPS]] receivers.<ref name="autogenerated1"/> Used in Long-CZ J8, Motorola F3 phones and some early Bluetooth USB dongles. Common with [[ESP8266]] and [[ESP32]] chips (40&nbsp;MHz is also supported). Used in some WiFi, WLan, Bluetooth, BLE, NFC and GSM systems.<ref name="jauch1"/>
|-
| 26.2144
| 
| 
| 
| 
| Popular for 102.4 kS/s, 204.8 kS/s or similar sampling systems, when a power-of-two size [[Fast Fourier transform|FFT]] follows the sampling. In this case the FFT ''frequency bins'' end up to be at "nice" frequencies for humans. Also allows integer division to 25&nbsp;Hz and multiples of 25&nbsp;Hz (50&nbsp;Hz, 100&nbsp;Hz, 200&nbsp;Hz); 26.2144&nbsp;MHz = 100×2<sup>18</sup> = 25×2<sup>20</sup>.
|-
| 26.5625
| [[Fibre Channel]]
| 
| 
| 
| Quadrupled to 106.250&nbsp;MHz [[Fibre Channel]] clock
|-
| 26.601712
| 
| 
| [[PAL]]
| 
| 6x the 4.43361875 color subcarrier frequency; clock crystal of the PAL region [[Nintendo Entertainment System|NES]] consoles, divided by 16 to CPU clock (1.662607&nbsp;MHz), see 21.47727&nbsp;MHz for NTSC region systems<ref name="wiki.nesdev.com"/>
|-
| 26.800
| 
| 
| [[SDTV]]
| 
| Common crystal in SDTV video handling systems (especially NTSC, square-pixel, or dual-mode systems; CCIR601 systems also use 24.576&nbsp;MHz)
|-
| 26.8436
| Digital signal generator
| 
| 
| 
| Exact frequency is 2^28/10&nbsp;Hz. Used to drive a DDS synthesizer with 28-bit accumulator; gives output from 0 to 2.68435&nbsp;MHz in 0.1&nbsp;Hz steps. Instek SFG-1000 series is one example.
|-
| 26.975
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 0/1 (grey/brown), "split" frequency; radio-controlled models of cars, boats, aircraft<ref>{{cite web |author=Jatech Limited |url=http://www.rccarsandtrucks.co.uk/1615_1.html |title=Radio Control Systems, Receivers and Crystals 27&nbsp;MHz & 40&nbsp;MHz, 27&nbsp;MHz Crystals &#124; Antics Online |publisher=Rccarsandtrucks.co.uk |accessdate=2010-06-05 |url-status=dead |archiveurl=https://web.archive.org/web/20081212034335/http://www.rccarsandtrucks.co.uk/1615_1.html |archivedate=2008-12-12 }}</ref>
|-
| 26.995
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 1 (brown); radio-controlled models of cars, boats, aircraft
|-
| 27.000
| 
| 
| [[SDTV]]
| 
| Master clock for PAL/NTSC DVD players, Digital TV receivers, some [[modem]]s etc. (27&nbsp;MHz is an exact multiple of the [[PAL]] and [[NTSC]] line frequencies). [[Master clock]] for [[MPEG-2]] video systems (also uses multiples - 54&nbsp;MHz, 81&nbsp;MHz). Pixel clock for [[SDTV]] (720×480p@59.94, 720×576p@50), divides by 2 to 13.5&nbsp;MHz clock (720×480i@59.94, 720×576i@25) and by 4 to 6.75&nbsp;MHz, very common
|-
| 27.025
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 1/2 (brown/red), "split" frequency; radio-controlled models of cars, boats, aircraft
|-
| 27.045
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 2 (red); some radio-controlled models of cars, boats, aircraft
|-
| 27.075
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 2/3 (red/orange), "split" frequency; radio-controlled models of cars, boats, aircraft
|-
| 27.095
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 3 (orange); some radio-controlled models of cars, boats, aircraft
|-
| 27.12
| [[RFID]]
| 
| 
| 
| Twice 13.56&nbsp;MHz, common contactless smartcard frequency ([[ISO/IEC 14443]]). Used in RFID/NFC systems.<ref name="jauch1"/>
|-
| 27.125
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 3/4 (orange/yellow), "split" frequency; radio-controlled models of cars, boats, aircraft; common crystal in vintage walkie talkies
|-
| 27.145
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 4 (yellow); some radio-controlled models of cars, boats, aircraft; gate and garage door remote controls; toy walkie talkies;<ref>{{Cite web|url=https://interferencetechnology.com/disney-walkie-talkies-pick-crude-trucker-conversation/|title = Disney Walkie-Talkies Pick up Crude Trucker Conversation|date = 23 October 2013}}</ref> between channels 15 and 16 of the [[Citizens Band radio|CB radio]]
|-
| 27.175
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 4/5 (yellow/green), "split" frequency; radio-controlled models of cars, boats, aircraft
|-
| 27.195
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 5 (green); radio-controlled models of cars, boats, aircraft
|-
| 27.225
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 5/6 (green/blue), "split" frequency; radio-controlled models of cars, boats, aircraft
|-
| 27.255
| RC
| 
| 
| 
| 27&nbsp;MHz band, band 6 (blue); some radio-controlled models of cars, boats, aircraft
|-
| 27.456
| [[GPS]]
| 
| 
| 
| Reference clock for some [[GPS]] systems. Available as TCXO.<ref name="foxonline1"/>
|-
| 27.648
| [[DECT]]
| 115200
| 
| {{Ya}}
| UART clock allows integer division to common baud rates up to 115,200(×16×15) or 576,000(×16×3). Twice the 13.824&nbsp;MHz of [[DECT]] master clock.
|-
| 28.060
| [[Amateur Radio]]
|
|
|
| A common [[QRP operation|QRP]] [[frequency]] ([[10-meter band]]). See also 7.025&nbsp;MHz.
|-
| 28.3046
| [[IBM 3270|3270]]
|
| 
|
| Twelve times the coax bit rate of [[IBM 3270]] networks.<ref>{{Cite web|url=https://github.com/cwsimmons/raw3270|title=Raw3270|website=[[GitHub]]|date=February 2020}}</ref>
|-
| 28.224
| modems
| 7200
| audio
| 
| UART clock allows integer division to common baud rates up to 7,200(×16×245) or 14,400(×8×245); used in some faxes and modems; [[ITU-T V-Series Recommendations|modem and fax rates]] (504×56000, 580×48000, 840×33600, 980×28800, 1960×14400, 2352×12000, etc.); also divides to common audio frequencies (147×192000, 588×48000, 640×44100, 1280×22050, 2560×11025)
|-
| 28.322
| 
| 
| [[Video Graphics Array|VGA]]
| 
| Common [[Video Graphics Array]] pixel clock (i.e., 720×350/400@70&nbsp;Hz, 31.46889&nbsp;kHz horizontal)<ref name="hinner1">[http://martin.hinner.info/vga/timing.html VGA timing information]. Martin.hinner.info. Retrieved on 2010-02-08.</ref>
|-
| 28.37516 <br /> 28.375
| 
| 
| [[PAL]]
| 
| Master clock for some PAL CCD cameras; 2 periods per pixel, 1816 periods per scan line, 567500 periods per frame. With frequency of 28.37516 video clock for all PAL Amiga computers.
|-
| 28.636363
| 
| 
| [[NTSC]]
| 
| Master clock for some NTSC CCD cameras. Video clock for all NTSC Amiga computers. Twice the 14.31818&nbsp;MHz frequency, shares its other uses, e.g. seed clock of PC ISA bus. Exactly 315/11&nbsp;MHz. 8×3.598545&nbsp;MHz of the NTSC colorburst. Used in some microcontroller based NTSC console emulators. See 35.46895&nbsp;MHz for corresponding PAL systems.<ref name="rossumblog.com">{{Cite web|url=https://rossumblog.com/2015/09/15/arduinocade/|title = Arduinocade|date = 16 September 2015}}</ref>
|-
| 28.800
| 
| 14400
| [[DVB-T]]
| 
| Used in some [[DVB-T]] USB dongle TV receivers, namely the RTL-SDR ones used for [[software-defined radio]]. UART clock allows integer division to common baud rates up to 14,400(×16×125) or 28,800(×8×125).
|-
| 29.4912
| 
| 921600
| 
| 
| UART clock allows integer division to common baud rates up to 921,600(×16×2).
|-
| 29.50
| 
| 
| [[SDTV]]
| 
| [[SDTV]] PAL 4:3 pixel clock (768×576p@50), square pixels
|-
| 30.000
| 
| 
| 
| 
| Common CPU clock. Used in some ISM wireless systems.<ref name="jauch1"/>
|-
| 30.240
| 
| 
| [[Video Graphics Array|VGA]]
| 
| Early [[Macintosh]] video pixel clock (VGA 640×480@66&nbsp;Hz)<ref name="hinner1"/>
|-
| 30.720
| 3G
| 38400
| 
| {{Ya}}
| A [[3G]] reference clock; twice the 15.36&nbsp;MHz, 8x the 3.84&nbsp;MHz WCDMA [[chip rate]]. Reference clock in [[W-CDMA (UMTS)|W-CDMA]] systems; can be multiplied by 16 to 491.52&nbsp;MHz common for driving [[Digital-to-analog converter|DAC]]s in WCDMA wireless [[base station]]s or by 32 to 983.04&nbsp;MHz for UMTS base stations or by 8 to 245.76&nbsp;MHz, other common DAC sampling frequency.<ref>{{cite web |url=http://www.openbasestation.org/Newsletters/June2007/TI_Clock_Generation.htm |archive-url=https://web.archive.org/web/20081201102443/http://www.openbasestation.org/Newsletters/June2007/TI_Clock_Generation.htm |url-status=dead |archive-date=2008-12-01 |title=de beste bron van informatie over open base station.Deze website is te koop! |publisher=Openbasestation.org |accessdate=2010-06-05 }}</ref> [[UART]] clock; allows integer division to common [[baud rate]]s (800×38400 baud or 800×32×1,200&nbsp;baud). Available as VCXO, TCXO and OCXO.
|-
| 31.3344
| 
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s (272×115200 baud or 272×96×1,200&nbsp;baud). CPU frequency or multiple of it (as well as video and system master clocks) in older Apple Macintosh computers (Classic, LC, etc.).
|-
| 31.50
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA modes 640×350@85, 640×400@85, VGA 640×480@72/75, all hsync 37.9&nbsp;kHz)<ref name="hinner1"/>
|-
| 32.000
| [[LoRa]]
| 
| 
| 
| common crystal for [[LoRa]] RF chips by [[Semtech]], available as TCXO; also used for Zigbee, 6LowPan, RF4CE, Bluetooth and BLE<ref name="jauch1">https://www.jauch.com/downloadfile/5a71d8c82b6658e1e124b5e39c36d2f6a/Jauch%20crystals%20for%20IoT%20applications.pdf {{Bare URL PDF|date=March 2022}}</ref>
|-
| 32.75
| 
| 
| [[SDTV]]
| 
| [[SDTV]] NTSC pixel clock (864×480p@59.94, close to FWVGA)
|-
| 32.768
| 
| 
| 
| {{Ya}}
| Allows binary division to 1&nbsp;kHz (2<sup>15</sup>×1&nbsp;kHz). Reference clock of some consumer [[GPS]] receivers. Commonly available as TCXO and OCXO.
|-
| 33.1776
| 
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (288×115200 baud or 288×96×1,200&nbsp;baud)
|-
| 33.33
| 
| 
| 
| 
| Common CPU clock, [[Conventional PCI|PCI]] bus clock
|-
| 33.554432
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>25</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 33.8688
| 
| 115200
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows integer division to [[44.1 kHz|44.1&nbsp;kHz]] (768×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. 12x2.8224&nbsp;MHz (DSD64 bitrate). Also allows integer division to common UART baud rates up to 115200. Available as a TCXO. Frequencies also used are 11.2896&nbsp;MHz, 16.9344&nbsp;MHz, 22.5972&nbsp;MHz and 45.1584&nbsp;MHz.
|-
| 34.368
| [[E-carrier|E3]]
| 38400
| 
| 
| [[E-carrier|E3]] data rate clock. [[UART]] clock; allows integer division to common [[baud rate]]s. (895×38400 baud or 895×32×1200&nbsp;baud)
|-
| 34.950 || RC || || || || 35&nbsp;MHz band, channel 55;  radio-controlled models of aircraft<ref>{{cite web |author=Jatech Limited |url=http://www.rccarsandtrucks.co.uk/1616_1.html |archive-url=https://archive.today/20120909215208/http://www.rccarsandtrucks.co.uk/1616_1.html |url-status=dead |archive-date=2012-09-09 |title=Radio Control Systems, Receivers and Crystals for 35MHz Radio, 35MHz Crystals &#124; Antics Online |publisher=Rccarsandtrucks.co.uk |date= |accessdate=2010-06-05 }}</ref>
|-
| 34.960 || RC || || || || 35&nbsp;MHz band, channel 56;  radio-controlled models of aircraft; VGA pixel clock (GTF mode PAL 768×576@60, hsync 35.82&nbsp;kHz)
|-
| 34.970 || RC || || || || 35&nbsp;MHz band, channel 57; radio-controlled models of aircraft
|-
| 34.980 || RC || || || || 35&nbsp;MHz band, channel 58; radio-controlled models of aircraft
|-
| 34.990 || RC || || || || 35&nbsp;MHz band, channel 59; radio-controlled models of aircraft
|-
| 35.000 || RC || || || || 35&nbsp;MHz band, channel 60;  radio-controlled models of aircraft
|-
| 35.010 || RC || || || || 35&nbsp;MHz band, channel 61;  radio-controlled models of aircraft
|-
| 35.020 || RC || || || || 35&nbsp;MHz band, channel 62;  radio-controlled models of aircraft
|-
| 35.0208
| 
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (304×115200 baud or 304×96×1,200&nbsp;baud)
|-
| 35.030 || RC || || || || 35&nbsp;MHz band, channel 63;  radio-controlled models of aircraft
|-
| 35.040 || RC || || || || 35&nbsp;MHz band, channel 64;  radio-controlled models of aircraft
|-
| 35.050 || RC || || || || 35&nbsp;MHz band, channel 65;  radio-controlled models of aircraft
|-
| 35.060 || RC || || || || 35&nbsp;MHz band, channel 66; radio-controlled models of aircraft
|-
| 35.070 || RC || || || || 35&nbsp;MHz band, channel 67;  radio-controlled models of aircraft
|-
| 35.080 || RC || || || || 35&nbsp;MHz band, channel 68;  radio-controlled models of aircraft
|-
| 35.090 || RC || || || || 35&nbsp;MHz band, channel 69; radio-controlled models of aircraft
|-
| 35.100 || RC || || || || 35&nbsp;MHz band, channel 70;   radio-controlled models of aircraft
|-
| 35.110 || RC || || || || 35&nbsp;MHz band, channel 71;   radio-controlled models of aircraft
|-
| 35.120 || RC || || || || 35&nbsp;MHz band, channel 72;  radio-controlled models of aircraft
|-
| 35.130 || RC || || || || 35&nbsp;MHz band, channel 73;   radio-controlled models of aircraft
|-
| 35.140 || RC || || || || 35&nbsp;MHz band, channel 74;   radio-controlled models of aircraft
|-
| 35.150 || RC || || || || 35&nbsp;MHz band, channel 75;  radio-controlled models of aircraft
|-
| 35.160 || RC || || || || 35&nbsp;MHz band, channel 76; radio-controlled models of aircraft
|-
| 35.170 || RC || || || || 35&nbsp;MHz band, channel 77; radio-controlled models of aircraft
|-
| 35.180 || RC || || || || 35&nbsp;MHz band, channel 78; radio-controlled models of aircraft
|-
| 35.190 || RC || || || || 35&nbsp;MHz band, channel 79;  radio-controlled models of aircraft
|-
| 35.200 || RC || || || || 35&nbsp;MHz band, [[channel 80]];   radio-controlled models of aircraft
|-
| 35.210 || RC || || || || 35&nbsp;MHz band, channel 81;   radio-controlled models of aircraft
|-
| 35.220 || RC || || || || 35&nbsp;MHz band, channel 82;   radio-controlled models of aircraft
|-
| 35.230 || RC || || || || 35&nbsp;MHz band, channel 83;  radio-controlled models of aircraft
|-
| 35.240 || RC || || || || 35&nbsp;MHz band, channel 84;   radio-controlled models of aircraft
|-
| 35.250 || RC || || || || 35&nbsp;MHz band, channel 85; radio-controlled models of aircraft
|-
| 35.2512
| 
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (306×115200 baud or 306×96×1,200&nbsp;baud)
|-
| 35.260 || RC || || || || 35&nbsp;MHz band, channel 86; radio-controlled models of aircraft
|-
| 35.270 || RC || || || || 35&nbsp;MHz band, channel 87; radio-controlled models of aircraft
|-
| 35.280 || RC || || || || 35&nbsp;MHz band, channel 88; radio-controlled models of aircraft
|-
| 35.290 || RC || || || || 35&nbsp;MHz band, channel 89; radio-controlled models of aircraft
|-
| 35.300 || RC || || || || 35&nbsp;MHz band, channel 90; radio-controlled models of aircraft
|-
| 35.328
| [[DSL]]
| 38400
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (64×552000 baud, 256×138000 baud, 460×38400 baud or 460×32×1,200&nbsp;baud); [[DSL]] clock: 2×17.664&nbsp;MHz ([[VDSL]]) ... 16×2.208&nbsp;MHz ([[ADSL]] ADC sampling rate)
|-
| 35.46895 <br /> 35.468
| 
| 
| [[PAL]]
| 
| 8×4.43361875&nbsp;MHz of the PAL colorburst (color subcarrier). Used in some microcontroller based PAL console emulators. 
 See 28.6363&nbsp;MHz for the corresponding NTSC systems.<ref name="rossumblog.com"/>
|-
| 35.50
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode 720×400@85, hsync 37.9&nbsp;kHz)<ref name="hinner1"/>
|-
| 36.000
| 
| 
| [[Video Graphics Array|VGA]]/[[SDTV]]
| 
| [[Video Graphics Array]] pixel clock (VESA modes VGA 640×480@85 with hsync 43.3&nbsp;kHz, SVGA 800×600@56 with hsync 35.2&nbsp;kHz.<ref name="hinner1"/> Pixel clock for [[SDTV]] PAL/NTSC (FWVGA 960×480p@59.94, 960×576p@50).
|-
| 36.864
| 
| 460800
| audio
| {{Ya}}
| UART clock allows integer division to common baud rates up to 460,800(×16×5). Audio clock allows integer division for 48 / 96 / 192 ksps.
|-
| 37.400
|
|
|
|
| Used in some WiFi and Bluetooth systems.<ref name="jauch1"/>
|-
| 38.400
| 3G
| 38400
| [[digital video broadcasting|DVB]]
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s (500×38,400 baud or 500×32×1,200&nbsp;baud). Also used as a [[3G]] reference clock, due to being a second (2×19.2&nbsp;MHz) least common multiple of [[W-CDMA]] [[chip rate]] 3.84&nbsp;MHz (5x) and 200&nbsp;kHz channel raster (96x).<ref name="ed-china1"/> Also used in some [[digital video broadcasting|DVB]] receiver chipsets. Used as reference clock in some [[Bluetooth]] systems, DECT phones, WiFi.<ref name="jauch1"/>
|-
| 38.88
| [[Digital Signal 1|DS1/T1]]/[[E-carrier|E1]]
| 
| 
| 
| Used in [[Digital Signal 1|DS1/T1]]/[[E-carrier|E1]] systems as a packet clock (2×19.44&nbsp;MHz). Commonly available as TCXO and OCXO.
|-
| 39.000
| [[GSM]]/[[UMTS]]
| 
| 
| 
| 3×13&nbsp;MHz. Commonly used as a reference clock for [[GSM]] and [[UMTS]] handsets. (39&nbsp;MHz is exactly 144 times the GSM bit rate). Available as TCXO.
|-
| 39.33
| 
| 
| [[SDTV]]
| 
| [[SDTV]] PAL 16:9 pixel clock (1024 WSWGA, 1024×576p@50), square pixels
|-
| 40.000
| 
| 
| 
| 
| Common CPU clock, WiFi, OFDM. [[Floating-point unit|FPU]] oscillator for Commodore A3630 card and found in dual band [[miniPCIe]] WiFi cards. VGA pixel clock (VESA mode SVGA 800×600@60 with hsync 37.9&nbsp;kHz).  Allows binary division to 10&nbsp;MHz. Used with [[ESP8266]] and [[ESP32]] chips (26&nbsp;MHz is also supported and seems more common). Used in some WiFi, Bluetooth and BLE, RFID/NFC, SimpleLink systems.<ref name="jauch1"/>
|-
| 40.320
| 
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (350×115200 baud or 350×96×1,200&nbsp;baud)
|-
| 40.655 || RC || || || || 40&nbsp;MHz band, channel 50; radio-controlled models of cars, boats<ref>{{cite web |author=Jatech Limited |url=http://www.rccarsandtrucks.co.uk/1617_1.html |title=Radio Control Systems, Receivers and Crystals 27MHz and 40MHz, 40MHz Crystals &#124; Antics Online |publisher=Rccarsandtrucks.co.uk |accessdate=2010-06-05 |url-status=dead |archiveurl=https://web.archive.org/web/20090813133022/http://www.rccarsandtrucks.co.uk/1617_1.html |archivedate=2009-08-13 }}</ref>
|-
| 40.665 || RC || || || || 40&nbsp;MHz band, channel 66; radio-controlled models of cars, boats
|-
| 40.675 || RC || || || || 40&nbsp;MHz band, channel 51; radio-controlled models of cars, boats
|-
| 40.680 ||    || || || || common crystal in garage door remotes and other remote controls; multiply by 32/3 to 433.92&nbsp;MHz
|-
| 40.685 || RC || || || || 40&nbsp;MHz band, channel 52; radio-controlled models of cars, boats
|-
| 40.695 || RC || || || || 40&nbsp;MHz band, channel 53; radio-controlled models of cars, boats
|-
| 40.705 || RC || || || || 40&nbsp;MHz band, channel 70; radio-controlled models of cars, boats
|-
| 40.715 || RC || || || || 40&nbsp;MHz band, channel 54; radio-controlled models of cars, boats
|-
| 40.725 || RC || || || || 40&nbsp;MHz band, channel 55; radio-controlled models of cars, boats
|-
| 40.735 || RC || || || || 40&nbsp;MHz band, channel 56; radio-controlled models of cars, boats
|-
| 40.745 || RC || || || || 40&nbsp;MHz band, channel 74; radio-controlled models of cars, boats
|-
| 40.755 || RC || || || || 40&nbsp;MHz band, channel 75; radio-controlled models of cars, boats
|-
| 40.765 || RC || || || || 40&nbsp;MHz band, channel 57; radio-controlled models of cars, boats
|-
| 40.775 || RC || || || || 40&nbsp;MHz band, channel 58; radio-controlled models of cars, boats
|-
| 40.775 || RC || || || || 40&nbsp;MHz band, channel 77; radio-controlled models of cars, boats
|-
| 40.785 || RC || || || || 40&nbsp;MHz band, channel 59; radio-controlled models of cars, boats
|-
| 40.795 || RC || || || || 40&nbsp;MHz band, channel 79; radio-controlled models of cars, boats
|-
| 40.805 || RC || || || || 40&nbsp;MHz band, channel 80; radio-controlled models of cars, boats
|-
| 40.815 || RC || || || || 40&nbsp;MHz band, channel 81; radio-controlled models of cars, boats
|-
| 40.825 || RC || || || || 40&nbsp;MHz band, channel 82; radio-controlled models of cars, boats
|-
| 40.835 || RC || || || || 40&nbsp;MHz band, channel 83; radio-controlled models of cars, boats
|-
| 40.875 || RC || || || || 40&nbsp;MHz band, channel 85; radio-controlled models of cars, boats
|-
| 40.885 || RC || || || || 40&nbsp;MHz band, channel 86; radio-controlled models of cars, boats
|-
| 40.915 || RC || || || || 40&nbsp;MHz band, channel 87; radio-controlled models of cars, boats
|-
| 40.935 || RC || || || || 40&nbsp;MHz band, channel 93; radio-controlled models of cars, boats
|-
| 40.945 || RC || || || || 40&nbsp;MHz band, channel 94; radio-controlled models of cars, boats
|-
| 40.960
| 
| 
| 
| 
| Allows binary division to 10&nbsp;kHz (2<sup>12</sup>×10&nbsp;kHz)
|-
| 40.975 || RC || || || || 40&nbsp;MHz band, channel 91;  radio-controlled models of cars, boats
|-
| 40.985 || RC || || || || 40&nbsp;MHz band, channel 92;  radio-controlled models of cars, boats
|-
| 40.985 || RC || || || || 40&nbsp;MHz band, channel 98;  radio-controlled models of cars, boats
|-
| 42.93
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode PAL 768×576@72, hsync 43.27&nbsp;kHz)<ref name="hinner1"/>
|-
| 43.16
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode VGA 640×480@100, hsync 50.9&nbsp;kHz)<ref name="hinner1"/>
|-
| 44.736
| [[Digital Signal 3|DS3]]
| 38400
| 
| 
| [[Digital Signal 3|DS3]] data rate clock. [[UART]] clock; allows integer division to common [[baud rate]]s. (1165×38400 baud or 1165×32×1200&nbsp;baud)
|-
| 44.90
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (industry standard XGA 1024×768i@43, hsync 35.5&nbsp;kHz)<ref name="hinner1"/>
|-
| 45.1584
| 
| 57600
| audio
| 
| Used in [[Compact Disc Digital Audio|CD-DA]] systems and [[CD-ROM]] drives; allows binary division to [[44.1 kHz|44.1&nbsp;kHz]] (1024×44.1&nbsp;kHz), 22.05&nbsp;kHz, and 11.025&nbsp;kHz. 16x2.8224&nbsp;MHz (DSD rate). UART clock allows integer division to common baud rates up to 57,600(×16×49) or 115,200(×8×49). Available as a TCXO. Frequencies also used are 11.2896&nbsp;MHz, 16.9344&nbsp;MHz, 22.5972&nbsp;MHz and 33.8688&nbsp;MHz.
|-
| 45.51
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode PAL 768×576@75, hsync 45.15&nbsp;kHz)<ref name="hinner1"/>
|-
| 48.000
| [[USB]]
| 
| [[Video Graphics Array|VGA]]/[[HDTV]]
| 
| found in old VGA cards,<ref>[http://www.qsl.net/va3iul/Multiband%20Beacon/Beacons.htm Low Power Multiband Beacon]. Qsl.net. Retrieved on 2010-02-08.</ref> High-speed USB (48&nbsp;MHz × 10 = 480Mbit/s). [[HDTV]] pixel clock (1280×1080i@25), variant compatible with CRT-based 31.250&nbsp;kHz horizontal deflection HDTVs. Used in some WiFi and Bluetooth systems.<ref name="jauch1"/>
|-
| 49.1520
| [[FireWire]]
| 
| audio
| 
| Digital audio systems - [[digital audio tape|DAT]], [[MiniDisc]], [[AC'97]], [[sound card]]s; 1024×48&nbsp;kHz (2<sup>10</sup>×48&nbsp;kHz); also used as bus reference clock in [[FireWire]] systems (with accuracy of 100 ppm). Twice the more-standard frequency of 24.576&nbsp;MHz. 6x8.192&nbsp;MHz. Available as TCXO.
|-
| 49.408
| [[Digital Signal 1|DS1]]
| 
| 
| 
| 32x1.544, the bit clock for [[Digital Signal 1|DS1]] systems (±32 ppm, ANSI T1.102). 
|-
| 49.450549
| 
| 
| [[HDTV]]
| 
| [[HDTV]] NTSC pixel clock (1280×1080i@29.97, 1280×1080p@29.97); 49.5/1.001
|-
| 49.500
| 
| 
| [[HDTV]]
| 
| [[HDTV]] ATSC pixel clock (1280×1080i@25/30, 1280×1080p@24/25/30). VGA pixel clock (VESA 800×600@75, hsync 46.9&nbsp;kHz)
|-
| 49.830<br />49.860<br />49.890
| RC
| 
| 
| 
| toy remote controls, walkie-talkies
|-
| 50.000
| [[Ethernet]]
| 
| 
| 
| [[Fast Ethernet]] (2×25&nbsp;MHz), VGA pixel clock (VESA mode 800×600@72, hsync 48.1&nbsp;kHz)<ref name="hinner1"/> [[PCI Express]] clock source, doubled to 100&nbsp;MHz. Amigakit ZorRAM memory cards.
|-
| 50.09
| [[Amateur Radio]]
|
|
|
| A common [[QRP operation|QRP]] [[frequency]] ([[6-meter band]]). Other crystal can be 50.4&nbsp;MHz. 3rd overtone. See also 7.025&nbsp;MHz.
|-
| 51.840
| [[Synchronous optical networking|SONET]]
| 115200
| VGA
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (450×115200 baud or 450×96×1,200&nbsp;baud); [[Synchronous optical networking|SONET]] STS-1 frequency (with accuracy of 20 =ppm);<ref name=using/> VGA pixel clock (GTF mode 768×576@85, hsync 51.42&nbsp;kHz). Can be generated from 6.48&nbsp;MHz xtal.
|-
| 52.000
| 
| 
| 
| 
| Used in some WiFi, WLAN and GSM systems.<ref name="jauch1"/>
|-
| 52.416
| [[modems]]
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (455×115200 baud or 455×96×1,200&nbsp;baud) and to [[ITU-T V-Series Recommendations|modem and fax rates]] (936×56000, 1092×48000, 1560×33600, 1820×28800, 3640×14400, 4368×12000, etc.); also divides to some common audio frequencies (273×192000, 1092×48000)
|-
| 53.125
| [[Fibre Channel]]
| 
| 
| 
| [[Fibre Channel]] clock
|-
| 54.000
| 
| 
| [[PAL]]/[[NTSC]]/[[HDTV]]
| 
| [[Raspberry Pi]] 4 (BCM2711) main clock crystal (19.2&nbsp;MHz for Raspberry Pi 3 and earlier). Clock for digital video systems (27&nbsp;MHz is an exact multiple of the PAL and NTSC line frequencies). 2x the 27&nbsp;MHz master clock for [[MPEG-2]] video systems (see also 81&nbsp;MHz). [[HDTV]] pixel clock (1440×1080i@25), variant compatible with CRT-based 31.250&nbsp;kHz horizontal deflection HDTVs.
|-
| 55.6319
| 
| 
| [[HDTV]]
| 
| [[HDTV]] NTSC pixel clock (4:3 1440×1080i@29.97, 1440×1080p@23.976/29.97); 55.6875/1.001
|-
| 55.6875
| 
| 
| [[HDTV]]
| 
| [[HDTV]] ATSC pixel clock (4:3 1440×1080i@25/30, 1440×1080p@24/25/30)
|-
| 56.30
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode SVGA 800×600@85, hsync 53.7&nbsp;kHz)<ref name="hinner1"/>
|-
| 56.448
| [[modems]]
| 115200
| 
| 
| 2×28.224&nbsp;MHz; used in some faxes and modems; [[UART]] clock, allows integer division to common baud rates (490×115200, 1024×38400, 2048×19200, etc.) and to [[ITU-T V-Series Recommendations|modem and fax rates]] (1008×56000, 1160×48000, 1680×33600, 1960×28800, 3920×14400, 4704×12000, etc.); also divides to common audio frequencies (294×192000, 1176×48000, 1280×44100, 2560×22050, 5120×11025)
|-
| 61.440
| [[WCDMA]]/[[3G]]
| 
| 
| 
| Used in wireless base stations; 2x30.72&nbsp;MHz
|-
| 62.57
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode PAL 768×576@100, hsync 61.1&nbsp;kHz)<ref name="hinner1"/>
|-
| 65.00
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode XGA 1024×768@60, hsync 48.4&nbsp;kHz)<ref name="hinner1"/>
|-
| 66.667
| 
| 
| 
| 
| common CPU clock, PCI bus clock
|-
| 67.108864
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>26</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 68.18
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SVGA 800×600@100, hsync 63.6&nbsp;kHz)<ref name="hinner1"/>
|-
| 70.656
| [[DSL]]
| 38400
| 
| 
| (2x35.328) [[UART]] clock; allows integer division to common [[baud rate]]s. (128×552000 baud, 512×138000 baud, 920×38400 baud or 920×32×1,200&nbsp;baud);[[DSL]] clock: 4×17.664&nbsp;MHz ([[VDSL]]) ... 32×2.208&nbsp;MHz ([[ADSL]] ADC sampling rate)
|-
| 72.000
| 
| 
| [[HDTV]]
| 
| [[HDTV]] pixel clock (FHD/2K 1920×1080i@25), variant compatible with CRT-based 31.250&nbsp;kHz horizontal deflection HDTVs
|-
| 74.1758242<br />74.176
| 
| 
| [[HDTV]]
| 
| [[HDTV]] NTSC pixel clock (HD/WXGA 1280×720p@23.976/29.97/59.94, 1920×1080i@29.97, 1920×1080p@23.976/29.97); 74.25/1.001; very common Multiply by 91/250 to get 27&nbsp;MHz.
|-
| 74.250
| 
| 
| [[HDTV]]
| 
| [[HDTV]] ATSC pixel clock (HD/WXGA 1280×720p@24/25/30/50/60, 1920×1080i@25/30, 1920×1080p@24/25/30); very common; also 1920×1080i@25, variant compatible with CRT-based 31.250&nbsp;kHz horizontal deflection HDTVs. Multiply by 4/11 to get 27&nbsp;MHz.
|-
| 75.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode XGA 1024×768@70, hsync 56.5&nbsp;kHz)<ref name="hinner1"/>
|-
| 77.760
| [[Synchronous optical networking|SONET]]/SDH
| 115200
| 
| 
| [[UART]] clock; allows integer division to common [[baud rate]]s. (675×115200 baud or 675×96×1,200&nbsp;baud). Commonly available as TCXO and OCXO. Multiplies to clock for communication for SONET/SDH/ATM, 1.5×51.840&nbsp;MHz (SONET STS-1 frequency). Can be generated from 19.44&nbsp;MHz xtal.
|-
| 78.125
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]], multiplies to 10&nbsp;GHz MAC-side bitrate, post-serdes; 78.125&nbsp;MHz = 1/132 of 10.3125&nbsp;GHz, 1/128 of 10.0&nbsp;GHz; often generated from 19.53125&nbsp;MHz xtal
|-
| 78.8
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode XGA 1024×768@75, hsync 60.0&nbsp;kHz)<ref name="hinner1"/>
|-
| 80.000
| 
| 
| audio
| 
| common CPU clock; used in some audio applications, available as TCXO. Allows binary division to 10&nbsp;MHz.
|-
| 80.566406
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]]. Multiplies (×128) to 10.3125&nbsp;GHz, copper wire bit rate. Can be generated from 20.141601 xtal.
|-
| 81.000
| 
| 
| [[PAL]]/[[NTSC]]/[[SDTV]]
| 
| Clock for digital video systems (27&nbsp;MHz is an exact multiple of the PAL and NTSC line frequencies). 3x the 27&nbsp;MHz master clock for [[MPEG-2]] video systems (see also 81&nbsp;MHz).
|-
| 81.62
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode XGA+ 1152×864@60, hsync 53.70&nbsp;kHz)<ref name="hinner1"/>
|-
| 83.46
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode WXGA 1280×800@60, hsync 49.68&nbsp;kHz)<ref name="hinner1"/>
|-
| 85.86
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode FWXGA 1368×768@60, hsync 47.7&nbsp;kHz)<ref name="hinner1"/>
|-
| 88.75
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (WXGA+ 1440×900@60)
|-
| 92.160
| [[WCDMA]]/[[3G]]
| 
| 
| 
| Used in wireless base stations; 3x30.72&nbsp;MHz
|-
| 94.5
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode XGA 1024×768@85, hsync 68.7&nbsp;kHz)<ref name="hinner1"/>
|-
| 98.901099
| 
| 
| [[HDTV]]
| 
| [[HDTV]] NTSC pixel clock (1280×1080p@59.94); 2x49.450549, 99/1.001
|-
| 99.000
| 
| 
| [[HDTV]]
| 
| [[HDTV]] ATSC pixel clock (1280×1080p@50/60)
|-
| 100.000
| 
| 
| 
| 
| [[Power of 10|10<sup>8</sup>]] allows decade division to 1&nbsp;Hz and 1&nbsp;kHz. [[PCI Express]] clock.<ref>[http://mobiledevdesign.com/standards_regulations/maxim-integrated-ds4100h-crystal-oscillator-0320/ Maxim Integrated Products First 100 MHz, HCSL-output crystal oscillator for PCI Express]. Mobiledevdesign.com (2008-03-20). Retrieved on 2010-02-08.</ref> Standard frequency, available as OCXO.
|-
| 106.250
| [[Fibre Channel]]
| 
| 
| 
| [[Fibre Channel]] clock for 1.0625 gigabaud rate
|-
| 106.47
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode WXGA+ 1440×900@60, hsync 55.92&nbsp;kHz)<ref name="hinner1"/>
|-
| 106.5
| radio
| 
| 
| 
| Used as an [[intermediate frequency|IF]] [[local oscillator|LO]] in microwave transceivers, e.g. on the amateur 10&nbsp;GHz band. Multiplied by 96 to produce 10.224&nbsp;GHz signal. Available as OCXO.
|-
| 108.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA modes XGA+ 1152×864@75 with hsync 675&nbsp;kHz, SXGA-/UVGA 1280×960@60 with hsync 60.0&nbsp;kHz, SXGA 1280×1024@60 with hsync 64&nbsp;kHz)<ref name="hinner1"/>
|-
| 111.2638
| 
| 
| [[HDTV]]
| 
| [[HDTV]] NTSC pixel clock (4:3 1440×1080p@59.94); 111.375/1.001
|-
| 111.375
| 
| 
| [[HDTV]]
| 
| [[HDTV]] ATSC pixel clock (4:3 1440×1080p@50/60); 2x55.6875
|-
| 113.31
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode XGA 1024×768@100, hsync 81.4&nbsp;kHz)<ref name="hinner1"/>
|-
| 116
| radio
| 
| 
| 
| Used as an [[intermediate frequency|IF]] [[local oscillator|LO]] in [[2-meter band|144 MHz]] [[transverter]]s. Available as TCXO. Sometimes used as [[GPS disciplined oscillator|GPS-disciplined]] OCXO.
|-
| 119.65
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode XGA+ 1152×864@85, hsync 77.1&nbsp;kHz)<ref name="hinner1"/>
|-
| 122.61
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA+ 1400×1050@60, hsync 65.22&nbsp;kHz)<ref name="hinner1"/>
|-
| 122.880
| [[WCDMA]]/[[3G]]
| 
| 
| 
| Standard frequency, available as TCXO, VCXO. Used in wireless base stations; 4x30.72&nbsp;MHz
|-
| 124.54
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA-/UVGA 1280×960@72, hsync 72.07&nbsp;kHz)<ref name="hinner1"/>
|-
| 125.000
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]] [[GMII]] GTXCLK clock, [[FDDI]] clock
|-
| 129.86
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA-/UVGA 1280×960@75, hsync 75.15&nbsp;kHz)<ref name="hinner1"/>
|-
| 134.217728
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>27</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 135.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode SXGA 1280×1024@75, hsync 80.0&nbsp;kHz)<ref name="hinner1"/>
|-
| 143.47
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode XGA+ 1152×864@100, hsync 91.5&nbsp;kHz)<ref name="hinner1"/>
|-
| 147.14
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode WSXGA+ 1680×1050@60, hsync 65.22&nbsp;kHz)<ref name="hinner1"/>
|-
| 148.351648
| 
| 
| [[HDTV]]
| 
| SMPTE 424, [[HDTV]] NTSC pixel clock (FHD/2K 1920×1080p@59.94); 148.5/1.001. Multiply by 91/500 to get 27&nbsp;MHz.
|-
| 148.5
| 
| 
| [[HDTV]]/[[HDMI]]
| 
| SMPTE 424, [[HDTV]] ATSC pixel clock (FHD/2K 1920×1080p@50/60); 2x74.25. VGA pixel clock (VESA mode 1280×960@85, hsync 85.9&nbsp;kHz). Standard [[HDMI]] pixel clock (4k YUV 4:2:0@30). Multiply by 4/22 to get 27&nbsp;MHz.
|-
| 149.34
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA+ 1400×1050@72, hsync 78.77&nbsp;kHz)<ref name="hinner1"/>
|-
| 150.000
| 
| 
| 
| 
| common reference oscillator, TCXO
|-
| 153.600
| [[WCDMA]]/[[3G]]
| 
| 
| 
| Standard frequency. Used in wireless base stations, available as TCXO, VCXO. 5x30.72&nbsp;MHz. Popular frequency of [[SAW filter]]s for [[intermediate frequency]] in microwave systems.
|-
| 154.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (WUXGA 1920×1200@60)
|-
| 155.520
| [[Synchronous optical networking|SONET]]/SDH
| 
| 
| 
| 3×51.840&nbsp;MHz (SONET STS-1 frequency), [[Synchronous optical networking|SONET]]/SDH clock. Can be generated from 19.44&nbsp;MHz xtal.
|-
| 155.85
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA+ 1400×1050@75, hsync 82.2&nbsp;kHz)<ref name="hinner1"/>
|-
| 156.25
| [[Ethernet]]
| 
| 
| 
| [[10 Gigabit Ethernet]] clock, 64-bit signal<ref name="tmcnet1">[http://dark-fiber.tmcnet.com/topics/dwdm-hardware/articles/60957-sitime-intros-oscillator-10-gigabit-ethernet-applications.htm SiTime Intros Oscillator for 10 Gigabit Ethernet Applications]. Dark-fiber.tmcnet.com (2009-07-29). Retrieved on 2010-02-08.</ref><ref name="freshpatents1">[http://www.freshpatents.com/-dt20091015ptan20090257445.php?type=description Pld architecture optimized for 10g ethernet physical layer solution] {{Webarchive|url=https://web.archive.org/web/20120229032801/http://www.freshpatents.com/-dt20091015ptan20090257445.php?type=description |date=2012-02-29 }}. Freshpatents.com. Retrieved on 2010-02-08.</ref> Multiplies by 64 to 10.0&nbsp;GHz (MAC-side serial bitrate) or by 66 to 10.3125&nbsp;GHz (wire-side serial bitrate, after encoding). In video-over-IP systems, often with 148.5 and 148.351648&nbsp;MHz.<ref>https://www.idt.com/eu/en/document/idt-clocks-smpte-and-xilinx-7-series-fpgas {{Dead link|date=February 2022}}</ref>
|-
| 157.5
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode SXGA 1280×1024@85, hsync 91.1&nbsp;kHz)<ref name="hinner1"/>
|-
| 161.132812
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]], 66-bit signal.<ref name="tmcnet1"/><ref name="freshpatents1"/> Multiplies (×64) to 10.3125&nbsp;GHz, copper wire bit rate. Can be generated from 20.141601 xtal.
|-
| 162.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode UXGA 1600×1200@60, hsync 75.0&nbsp;kHz)<ref name="hinner1"/>
|-
| 165.0
| 
| 
| [[HDMI]]/[[Digital Visual Interface|DVI]]
| 
| [[HDMI]]/[[Digital Visual Interface|DVI]] serial clock for 1080p@60 ([[Transition-minimized differential signaling|TMDS]] encoding)
|-
| 175.5
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode UXGA 1600×1200@65, hsync 81.3&nbsp;kHz)<ref name="hinner1"/>
|-
| 178.99
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA-/UVGA 1280×960@100, hsync 101.7&nbsp;kHz)<ref name="hinner1"/>
|-
| 179.26
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA+ 1400×1050@85, hsync 93.76&nbsp;kHz)<ref name="hinner1"/>
|-
| 184.320
| [[WCDMA]]/[[3G]]
| 
| 
| 
| Used in wireless base stations; 6x30.72&nbsp;MHz
|-
| 187.50
| [[Ethernet]]
| 
| 
| 
| 10x18.75&nbsp;MHz; see also 75&nbsp;MHz, 150&nbsp;MHz
|-
| 189.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode UXGA 1600×1200@70, hsync 87.5&nbsp;kHz)<ref name="hinner1"/>
|-
| 190.96
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA 1280×1024@100, hsync 108.5&nbsp;kHz)<ref name="hinner1"/>
|-
| 193.16
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode WUXGA 1920×1200@60, hsync 74.52&nbsp;kHz)<ref name="hinner1"/>
|-
| 196.608
| [[E-carrier level 1|E1]]
| 
| 
| 
| Allows division to 1&nbsp;kHz (3×2^16×1&nbsp;kHz). Bit clock for E1 systems. 48x4.096&nbsp;MHz, 96x2.048&nbsp;MHz.
|-
| 202.5
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode UXGA 1600×1200@75, hsync 93.8&nbsp;kHz)<ref name="hinner1"/>
|-
| 204.8
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode 1792×1344@60, hsync 83.6&nbsp;kHz)<ref name="hinner1"/>
|-
| 214.39
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode SXGA+ 1400×1050@100, hsync 111.2&nbsp;kHz)<ref name="hinner1"/>
|-
| 218.3
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode 1856×1392@60, hsync 86.3&nbsp;kHz)<ref name="hinner1"/>
|-
| 229.5
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode UXGA 1600×1200@85, hsync 106.3&nbsp;kHz)<ref name="hinner1"/>
|-
| 234.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode 1920×1440@60, hsync 90.0&nbsp;kHz)<ref name="hinner1"/>
|-
| 234.59
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (QHD 2560×1440@60)
|-
| 261.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode 1792×1344@75, hsync 106.3&nbsp;kHz)<ref name="hinner1"/>
|-
| 268.435456
| 
| 
| 
| {{Ya}}
| [[Power of two#Table of values|2<sup>28</sup>]] allows binary division to 1&nbsp;Hz and 32.768&nbsp;kHz. Real-time clock; also for [[direct digital synthesis|DDS]] generators with 1&nbsp;Hz step
|-
| 280.64
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (GTF mode UXGA 1600×1200@100, hsync 127.1&nbsp;kHz)<ref name="hinner1"/>
|-
| 288.0
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (VESA mode 1856×1392@75, hsync 112.5&nbsp;kHz)<ref name="hinner1"/>
|-
| 297.0
| 
| 
| [[Video Graphics Array|VGA]]/[[HDMI]]
| 
| VGA pixel clock (VESA mode 1920×1440@75, hsync 112.5&nbsp;kHz).<ref name="hinner1"/> High-speed [[HDMI]] pixel clock (2x148.5, 4k YUV 4:2:0@60, RGB@30).
|-
| 311.04
| [[Synchronous optical networking|SONET]]/SDH
| 
| 
| 
| 6×51.840&nbsp;MHz (SONET STS-1 frequency), [[Synchronous optical networking|SONET]]/SDH clock.
|-
| 312.5
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]], multiplies (×32) to 10&nbsp;GHz MAC-side bitrate, or (×33) to 10.3125&nbsp;GHz copper-wire serial bitrate; often generated from 19.53125&nbsp;MHz xtal
|-
| 312.787
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (21.5:9 3440×1440@60)
|- 315.000
| 
| 
| 
| radio (ISM)
| 
| SAW resonators for Chinese 315&nbsp;MHz ISM band RF remote control fobs
|-
| 322.265625
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]], PHY, 66-bit signal. Multiplies (×32) to 10.3125&nbsp;GHz, copper wire bit rate. Can be generated from 20.141601 xtal.
|-
| 336.375
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (QHD 2560×1440@85)
|- 433.920
| 
| 
| 
| radio (ISM)
| 
| SAW resonators for 433.92&nbsp;MHz ISM band RF remote control fobs
|-
| 448.5
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (21.5:9 3440×1440@85)
|-
| 483.120
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (QHD 2560×1440@120)
|-
| 531.52
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (4K UHD 3440×1440@100)
|-
| 533.250
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (4K UHD 3840×2160@60)
|-
| 586.586
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (QHD 2560×1440@144)
|-
| 622.08
| [[Synchronous optical networking|SONET]]/SDH
| 
| 
| 
| 12×51.840&nbsp;MHz (SONET STS-1 frequency), [[Synchronous optical networking|SONET]]/SDH clock.
|-
| 625.0
| [[Ethernet]]
| 
| 
| 
| [[Gigabit Ethernet]], multiplies (×16) to 10&nbsp;GHz MAC-side bitrate
|-
| 644.160
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (21.5:9 3440×1440@120)
|-
| 678.100
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (QHD 2560×1440@165)
|-
| 1075.804
| 
| 
| [[Video Graphics Array|VGA]]
| 
| VGA pixel clock (4K UHD 3840×2160@120)
|}

==References==
{{Reflist}}

[[Category:Electronic oscillators]]
[[Category:Electrical components]]