View source for Transducer ID

{{Orphan|date=November 2019}}

{{short description|Ultrasonic transducer identification system}}

'''XID''' or '''Transducer ID™''' is a device communications [[Bus (computing)|bus system]] designed by Airmar Technology Corp., US<ref name="xidpatent"/> to enable an echosounder to identify the type of ultrasonic transducer being connected.
This allows the echosounder to adjust for the specific properties of the transducer such as frequency, power rating, beam pattern.<ref>{{cite web |url=http://www.airmartechnology.com/uploads/pressrelease/xid%20release.pdf |title= Airmar Transducer ID Press Release |website=Airmar Technology Corp. |date=2006-05-10 |access-date=2019-06-28 |quote=...&nbsp;enables the transducer to transmit important data to the echosounder, including transducer model, functions, frequency, power rating, beam pattern, impedance, ceramic element configuration and acoustic window material. |archive-url=https://web.archive.org/web/20100922051806/http://airmartechnology.com/uploads/pressrelease/XID%20RELEASE.pdf|archive-date=2010-09-22}}</ref>

Communication is done over a [[Single-wire transmission line|single wire]] in a controller-device pattern with the [[echosounder]] as controller, and the [[Ultrasonic transducer|transducer]] as device.
Whileas electrically similar to [[1-Wire]], its protocol has no means of enumeration of multiple devices.

The system is implemented by [[Garmin]] and [[Raymarine]] in some of their echosounders.

== Protocol<ref name=xidpatent/> ==

The bus is designed to work with 5V as logical 1, 0V as logical 0 with some means of protection against accidental connection to a boat's 12V DC system.
The slave may be powered from the bus.

=== Low level signalling ===

Signalling is made with four types of bit primitives:
# "read" bit primitive
# "write 1" bit primitive
# "write 0" bit primitive
# "reset" bit primitive

==== Timing Constraints ====
{| class="wikitable"
|-
! Symbol!! Parameter !! Min. !! Typ. !! Max. !! Units
|-
| t<sub>CYC</sub> || Cycle Time || 100 || - || - || µS
|-
| t<sub>RDL</sub> || Read Clock Low Time || 8 || 10 || 12 || µS
|-
| t<sub>PRE</sub> || ID Bus Precharge Time || 2 || - || - || µS
|-
| t<sub>HI-Z</sub> || Read Bit High Impedance Time || - || - || 40 || µS
|-
| t<sub>DR</sub> || Time to Data Ready || 20 || - || 26 || µS
|-
| t<sub>DH</sub> || Data Hold Time || 9 || - || 11 || µS
|-
| t<sub>W1L</sub> || Write "1" Low Time || 17 || 19 || 21 || µS
|-
| t<sub>W0L</sub> || Write "0" Low Time || 28 || 30 || 32 || µS
|-
| t<sub>RESETL</sub> || Reset Time Low || 43 || - || - || µS
|-
| t<sub>RESETH</sub> || Reset Time High || 200 || - || - || µS
|-
|}

==== "reset" bit primitive ====
<!--
// https://wavedrom.com/editor.html
{ signal: [
  
  {              node: '...F...I..........J', phase:2.15 },
  { name: 'XID', wave: '1.|0...1....|.....x',phase:2.15, data:["resetL", "resetH", "resetH", "resetH"] },
  {  },
  {              node: '...G...H..........K', phase:2.15 },

],
  edge: ['b-|a t1', 'a-|c t2', 'b-|-c t3', 'c-|->e t4', 'e-|>f more text', 'e|->d t6', 'c-g', 'H-I', 'F-G','J-K ', 'G<-|->H t_ResetL > 43µs', 'H<->K t_ResetH > 200µs'],
 
 head: {text: '"reset" bit primitive'}
}
-->
[[File:XID transducer ID "reset" bit primitive.svg|"reset" bit primitive timing diagram]]

"reset" aborts all commands and instructs transducer to enter its initial state.

==== "read" bit primitive ====
<!--
// https://wavedrom.com/editor.html
{ signal: [

  {              node: '...A......B', phase:2.15 },
  {              node: '...C..DE...', phase:2.15 },
  {              node: '...FG......', phase:2.15 },
  { name: 'XID', wave: '1.|01.3u1.x',
                 node: '...L.MNOVRP', phase:2.15},
  {              node: '...SUHI.TWJ', phase:2.15 },
  
],
  edge: ['A-L', 'A<->B t_CYC', 'W-R','B-P',
  'C<->D t_DR', 'D-N','D<->E t_DH','E-O',
'F<->G t_RDL', 'G-U',
'U<->H t_PRE', 'H-M','H<->T t_HI-Z', 'T-V','T<->W t_PRE'],
 
 head: {text: '"read" bit primitive'}
}
-->
[[File:XID transducer ID "read" bit primitive timing diagram.svg|"read" bit primitive timing diagram]]

The transducer's controller is attached to the signalling line via a bidirectional IO pin with a weak pull-up resistor.
The controller's IO pin is in high impedance state. After receiving the "read" bit primitive, it becomes an output to drive the bus low as required.

==== "write 1" bit primitive ====

<!--
// https://wavedrom.com/editor.html
{ signal: [

  {              node: '...A.........B', phase:2.15 },
  {              node: '...C.D........', phase:2.15 },
  {              node: '...FT.........', phase:2.15 },
  { name: 'XID', wave: '1.|0.1.......x',
                 node: '...L.MNO..P..Q.', phase:2.15},
  
],
  edge: ['A-L', 'A<->B t_CYC', 'B-R',
  'C<->D t_W1L', 'D-M','D<->E t_DH','E-P',
'F<->G t_RDL', 'G-M', 'B-Q',
'H<->I t_PRE', 'H-M','I-N','I<->K t_HI-Z', 'K-Q','K<->R t_PRE'],
 
 head: {text: '"write 1" bit primitive'}
}
-->
[[File:XID transducer id "write 1" bit primitive timing diagram.svg|"write 1" bit primitive timing diagram]]

==== "write 0" bit primitive ====
<!--
// https://wavedrom.com/editor.html
{ signal: [

  {              node: '...A.........B', phase:2.15 },
  {              node: '...C..D.......', phase:2.15 },
  {              node: '...FT.........', phase:2.15 },
  { name: 'XID', wave: '1.|0..1......x',
                 node: '...L.MNO..P..Q.', phase:2.15},
  
],
  edge: ['A-L', 'A<->B t_CYC', 'B-R',
  'C<->D t_W0L', 'D-N','D<->E t_DH','E-P',
'F<->G t_RDL', 'G-M', 'B-Q',
'H<->I t_PRE', 'H-M','I-N','I<->K t_HI-Z', 'K-Q','K<->R t_PRE'],
 
 head: {text: '"write 0" bit primitive'}
}
-->
[[File:XID transducer id "write 0" bit primitive timing diagram.svg|"write 0" bit primitive timing diagram]]

=== Commands ===

The echosounder can issue four different commands.
Bit order is LSB first.

{| class="wikitable"
|-
! Command Mnemonic!! Opcode !! Address !! Data Read Size
|-
| RESET || - || - || -
|-
| READ_VERSION || 0xCC || - || variable
|-
| READ_BYTE || 0x33 || 8bit address  || 8 bit
|-
| READ_BLOCK || 0x99 || - || variable
|-
| CHECK_STATUS || - || - || 1 bit
|-
|}

==== RESET command ====
RESET is issued as a bit primitive as described above.

==== READ_VERSION command ====
READ_VERSION is issued as Opcode 0xCC written to the slave.

Afterwards, a sequence of bytes is read with the first byte denoting the byte length of the available data.

READ_VERSION should be the first command after a RESET.

==== READ_BYTE command ====

READ_BYTE is issued as Opcode 0x33 and an 8 bit address written to the slave.

Valid addresses are 0..126, inclusive.

Afterwards, the result byte is clocked in.

==== READ_BLOCK command ====

READ_BLOCK is issued as Opcode 0x33.

Afterwards, a sequence of bytes is read with the first byte denoting the byte length of the available data.
The last two bytes are a 16 bit checksum (big endian) using [[Cyclic redundancy check|CRC-16-IBM]] algorithm.

==== CHECK_STATUS command ====

CHECK_STATUS is identical to the "read" bit primitive command.

If the transducer's processor is not able to respond, the bus will remain high during the read.

If the transducer's processor is waiting for a command, it answers the "read" bit primitive command by pulling the bus to low.

==References==
{{Reflist|refs=<ref name=xidpatent>{{cite patent |title=Transducer identification |country=US |number=2005259517 |gdate=2005-11-24}}</ref>}}
{{Refbegin}}
* {{cite web |url=https://www.gemeco.com/wiring-transducer.php|title=Transducer wiring diagrams|date=2019-06-28 |archive-url=https://web.archive.org/web/20190618072802/https://www.gemeco.com/wiring-transducer.php|archive-date=2019-06-18}}
* {{cite web |url=https://www.gemeco.com/wiring-chirp.php|title=Wiring Diagrams for CHIRP Transducers|date=2019-06-28 |archive-url=https://web.archive.org/web/20180827022759/https://www.gemeco.com/wiring-chirp.php|archive-date=2018-08-27}}
{{Refend}}



[[Category:Transducers]]