Autonomous peripheral operation

Not to be confused with Autonomous decentralized system or Decentralized autonomous organization.

In computing, autonomous peripheral operation is a hardware feature found in some microcontroller architectures to off-load certain tasks into embedded autonomous peripherals in order to minimize latencies and improve throughput in hard real-time applications as well as to save energy in ultra-low-power designs.

Overview

Forms of autonomous peripherals in microcontrollers were first introduced in the 1990s. Allowing embedded peripherals to work independently of the CPU and even interact with each other in certain pre-configurable ways off-loads event-driven communication into the peripherals to help improve the real-time performance due to lower latency and allows for potentially higher data throughput due to the added parallelism. Since 2009, the scheme has been improved in newer implementations to continue functioning in sleep modes as well, thereby allowing the CPU (and other unaffected peripheral blocks) to remain dormant for longer periods of time in order to save energy. This is partially driven by the emerging IoT market.<ref name="R26"/>

Conceptually, autonomous peripheral operation can be seen as a generalization of and mixture between direct memory access (DMA) and hardware interrupts. Peripherals that issue event signals are called event generators or producers whereas target peripherals are called event users or consumers. In some implementations, peripherals can be configured to pre-process the incoming data and perform various peripheral-specific functions like comparing, windowing, filtering or averaging in hardware without having to pass the data through the CPU for processing.

Implementations

Known implementations include:

• Peripheral Event Controller (PEC) in Siemens/Infineon C166 and C167 16-bit microcontrollers since 1990<ref name="Wolf_1994"/><ref name="Siemens_2000_C167CR"/><ref name="Infineon_2004"/><ref name="Irber_2018"/>
• Intelligent autonomous peripherals (Capture compare unit CCU6) in Infineon XC800 series of 8051-compatible 8-bit microcontrollers since 2005<ref name="R24"/>
• Event System (EVSYS) in Atmel AVR XMEGA 8-bit microcontrollers since 2008<ref name="R12"/><ref name="R3"/>
• Peripheral Event System (PES) with SleepWalking<ref name="R1"/> in Atmel (now Microchip Technology) AVR32 AT32UC3L 32-bit microcontrollers since 2009<ref name="R10"/><ref name="R2"/><ref name="R17"/>
• Peripheral Reflex System (PRS) in Energy Micro (now Silicon Labs) Gecko EFM32 32-bit ARM-based microcontrollers since 2009<ref name="R11"/><ref name="R4"/><ref name="R17"/>
• IXYS/Zilog ZNEO Z16FMC 16-bit microcontrollers since 2011<ref name="R21"/><ref name="R22"/>
• Event Link Controller (ELC) in Renesas microcontrollers since 2011
• Programmable Peripheral Interconnect (PPI) in Nordic nRF 32-bit ARM-based microcontrollers since about 2011<ref name="R5"/>
• Autonomous peripherals in Infineon XMC 32-bit microcontrollers since 2012<ref name="R25"/>
• Data Transfer Manager (DTM) in Silicon Labs Precision32 SiM3L1 32-bit ARM Cortex-M3 microcontrollers since 2012<ref name="R15"/><ref name="R17"/><ref name="R19"/>
• Peripheral Event System (PES) with SleepWalking in Atmel (now Microchip Technology) SAM4L 32-bit ARM Cortex-M4 microcontrollers since 2012<ref name="R20"/>
• Power-Smart Peripherals in Freescale (now NXP) Kinetis L 32-bit ARM Cortex-M0+ microcontrollers since 2012<ref name="R23"/>
• Event System (EVSYS) with SleepWalking<ref name="R1"/> in Atmel (now Microchip Technology) SAMD, SAML and SAMC 32-bit ARM Cortex-M0+ microcontrollers since 2013<ref name="R6"/><ref name="R18"/>
• Core Independent Peripherals (CIP) in Microchip PIC16F<ref name="R7"/> and PIC18F<ref name="R8"/> as well as Microchip AVR ATtiny 8-bit microcontrollers since 2015<ref name="R9"/><ref name="R13"/><ref name="R14"/>
• Peripherals Interconnect Matrix in STMicroelectronics' STM32 32-bit ARM-based microcontrollers since 2015<ref name="R16"/>
• Low-Power Background Autonomous Mode (LPBAM) in STMicroelectronics' STM32U5 32-bit ARM-based microcontrollers since 2021<ref name="ST_2021"/>

See also

• Channel I/O
• Peripheral DMA controller (PDC)
• Clock gating, autonomous peripheral clock gating
• Power gating
• CPU power dissipation
• Low-power electronics
• Event-driven architecture
• Event-driven programming
• Always On, Always Connected (AOAC)
• Energy-Efficient Ethernet (EEE)
• TCP offload engine (TOE)