Clock Constraints Specification Language

The Clock Constraint Specification Language or CCSL, is a software language for modeling relations among so-called clocks. It is part of the time model defined in the UML Profile for MARTE.<ref>"The UML Profile for MARTE: Modeling and Analysis of Real-Time and Embedded Systems | www.omgwiki.org/marte". Archived from the original on 2014-02-09. Retrieved 2014-01-28.</ref>

CCSL provides a concrete syntax to handle logical clocks. The term logical clock refers to Leslie Lamport's logical clocks and its usage in CCSL is directly inspired from Synchronous programming languages (like Esterel or Signal).

A solver of CCSL constraints is implemented in the TimeSquare tool.<ref>"TimeSquare – LOGICAL TIME MATTERS".</ref>